최소 단어 이상 선택하여야 합니다.
최대 10 단어까지만 선택 가능합니다.
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
NTIS 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
DataON 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Edison 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Kafe 바로가기국가/구분 | United States(US) Patent 등록 |
---|---|
국제특허분류(IPC7판) |
|
출원번호 | US-0688083 (2007-03-19) |
등록번호 | US-7324361 (2008-01-29) |
발명자 / 주소 |
|
출원인 / 주소 |
|
대리인 / 주소 |
|
인용정보 | 피인용 횟수 : 143 인용 특허 : 61 |
An inverter for use in connecting a DC power source to the utility grid includes a single DC-AC conversion stage, maximum (source) power tracking, and current control based on feed-forward compensation as a function of input power voltage error, rectified utility line voltage, and a scaled inverse o
An inverter for use in connecting a DC power source to the utility grid includes a single DC-AC conversion stage, maximum (source) power tracking, and current control based on feed-forward compensation as a function of input power voltage error, rectified utility line voltage, and a scaled inverse of RMS utility line voltage. Various topologies of the inverter power stage are developed for bi-directional power-flow operation after those developed for unidirectional power-flow operation. Various embodiments also include over-voltage protection, over-current protection, under-voltage protection, over-temperature protection, and stand-by battery with battery management control, while still others are adapted for a multiple-channel front-end distributed power system with distributed maximum power tracking for serving as a single DC power source input to the inverter system downstream with controllers, emergency or auxiliary loads, and alternative current feedback control systems. Improved control architectures are developed with bipolar sensing of the inverter output current and a bipolar sinusoidal reference signal.
What is claimed is: 1. A bi-directional power supply adapted to supply AC power to a utility grid or stand-alone load, comprising: a DC power source; a bi-directional inverter that provides output power through a single power stage of DC-AC conversion; an output filtering grid interface that filter
What is claimed is: 1. A bi-directional power supply adapted to supply AC power to a utility grid or stand-alone load, comprising: a DC power source; a bi-directional inverter that provides output power through a single power stage of DC-AC conversion; an output filtering grid interface that filters and supplies the output power from the bi-directional inverter into the utility grid; and a system controller for regulating the voltage of the DC power source at its maximum power voltage, controlling the waveform of the inverter output current to be sinusoidal, and reducing the output power when the utility grid voltage exceeds a predetermined threshold; wherein the output power: tracks the maximum power output of the DC power source; and is sinusoidal AC current that is controlled to be other in phase with or optimally phase-shifted with the utility grid voltage; wherein the bi-directional inverter comprises a cascade connection of an input bulk capacitor for sufficient energy storage to limit voltage ripple across the DC power source to a predetermined level, a line-filter for filtering the inverter input current to suppress the conducted and radiated switching noise produced by the inverter, and the bi-directional inverter power stage; and wherein the output filtering grid interface comprises an output filter, a fuse, and an output relay switching network for transferring power to either the utility grid or the stand-alone load. 2. The power supply of claim 1, further comprising: an input-output isolation means for electrically isolating the input of the bi-directional inverter from its output while electrical power is transferred from the inverter input to the inverter output through the isolation means operating at a switching frequency, which has an input and an output being electrically isolated from each other; a set of one or more controllable input semiconductor switches that are parts of the inverter input circuit but are electrically isolated from the inverter output and controlled by the system controller at the switching frequency to regulate the inverter output current to have a sinusoidal waveform that is either in phase with or optimally phase-shifted with the utility grid voltage; and an output filtering means for absorbing AC switching ripple current from the AC sinusoidal output current to produce a filtered AC sinusoidal output current, and transferring the filtered AC sinusoidal output current into the utility grid, and attenuating common-mode switching noise that radiates from the inverter semiconductor switching through the utility grid transmission line; wherein the input-output isolation means and the input semiconductor switches are parts of the bi-directional inverter and operate at the same switching frequency, which is at least about 20 kHz; wherein the inverter output has its power components internally interconnected from the output of the input-output isolation means to the inverter output that is externally terminated by the output filtering grid interface which comprises the output relay switching network and the output filter; wherein the inverter input includes the DC power source, the input bulk capacitor, the line filter, and all interconnected components that are electrically connected to the input of the input-output isolation means; and wherein the inverter semiconductor switching occurs at the same switching frequency and includes switching of all passive and active semiconductor switches within the inverter circuit. 3. The power supply of claim 1, further comprising: an ideal full-wave rectifier configured to sense and convert the inverter output current into a rectified feedback current signal that is used to regulate the waveform of the inverter output current to be rectified sinusoidal; a rectified sinusoidal reference signal, VSIN--REC, that commands the rectified feedback current signal IFB to track a reference current waveform IREF; an average current regulation controller provides an amplified frequency-compensated error signal, Vcon, from its two analog input signals, one being the rectified feedback current signal IFB and the other being the reference current waveform, IREF; a uni-polar three-input multiplier and feed-forward compensation circuit that provides a reference current commanding signal, IREF>0, from the rectified reference signal VSIN--REC, an error signal output of an input voltage regulation controller VERR, and the inverse of the RMS value derived from a sensed utility grid voltage, VUT; a PWM and gate drive circuit that produces a set of isolated PWM switching signals that drive the controllable semiconductor switches within the bi-directional inverter power stage; wherein the PWM and gate drive circuit has two inputs, including one that receives the frequency-compensated error signal Vcon, and another that receives a sense signal, Y, that indicates the direction of current flow into or out of the utility grid for in-phase synchronization with the utility grid voltage. 4. The power supply of claim 1, further comprising: a bipolar current sensor for sensing and converting the AC inverter output current into the bipolar feedback current signal IOUT used for regulating its waveform to be sinusoidal; a sinusoidal reference signal, VSIN--AC, for providing the reference sinusoidal waveform that commands the bipolar feedback current signal IOUT to track the reference waveform IREF; an average current regulation controller for providing an amplified frequency-compensated error signal, Vcon, from its two analog inputs, one is the said bipolar feedback current signal IFB and the other the reference current commanding signal, IREF; a bipolar three-input multiplier and feed-forward compensation circuit for providing an appropriate reference current commanding signal, IREF, from the said reference sinusoidal signal VSIN--AC, the error signal output of the input voltage regulation controller VERR, and the inverse of the RMS value derived from the sensed utility grid voltage, VUT; a PWM and gate drive circuit (block 300) for producing a set of isolated PWM switching signals that drive all the controllable semiconductor switches within the bi-directional inverter power stage; wherein the PWM and gate drive circuit have two inputs, one for the analog control signal Vcon that is output from the average current regulation controller and the other, Y, for providing the direction of current flow into the utility grid for in-phase synchronization with the utility grid voltage. 5. A bi-directional power supply adapted to supply AC power to a utility grid or stand-alone load, comprising: a DC power source; a bi-directional inverter that provides output power through a single power stage of DC-AC conversion; an output filtering grid interface that filters and supplies the output power from the bi-directional inverter into the utility grid; and a system controller for regulating the voltage of the DC power source at its maximum power voltage, controlling the waveform of the inverter output current to be sinusoidal, and reducing the output power when the utility grid voltage exceeds a predetermined threshold; the stand-by battery management control circuit controls a first and a second semiconductor battery switch to operate a stand-by battery in an isolation mode, a stand-by mode, a charging mode, an input voltage clamping mode, and a battery-dominated input mode; the stand-by battery is in the isolation mode when the first and second semiconductor battery switches are turned off; the stand-by battery is in the stand-by mode when the first semiconductor battery switch is turned on, the second semiconductor battery switch is turned off, and the inverter and output filtering grid interface provide transient power to the stand-alone load; the stand-by battery is in the charging mode when the first semiconductor battery switch is turned off and the second semiconductor battery switch is linearly regulated to maintain a healthy state of charge in the stand-by battery at low power, while the system controller regulates the DC power source output voltage at a level that is typically above the battery voltage; the stand-by battery is in the input voltage clamping mode when the first semiconductor battery switch is turned off, the second semiconductor switch is turned on continuously or linearly regulated with a pulse-width modulation control, and the inverter and output filtering grid interface are shut down, to restore a healthy state of charge to the stand-by battery without power transfer to the inverter; and the stand-by battery is in the battery-dominated input mode, when the first semiconductor battery switch is turned on and the second semiconductor switch is turned on continuously or linearly regulated with a pulse-width modulation control, for providing power transfer either to the stand-alone load when there is no power available from the DC power source, or for fast battery charging while the inverter is shut down; wherein the output power is controlled to track the maximum-power voltage of the DC power source and to have an output sinusoidal AC current that is controlled to be in phase with or optimally phase-shifted with the utility grid voltage when the DC power source is active and the stand-by battery management control circuit operates in any of the following modes: the battery-charging mode, the battery stand-by mode, the battery isolation mode; wherein the output power is controlled to have a regulated AC output voltage across the stand-alone load when the DC power source is inactive and the stand-by battery management control circuit operates in a battery-dominated input mode; wherein the output power is cut off from both the utility grid and the stand-alone load when the stand-by battery management control circuit operates in an input-voltage clamping mode for maintaining the stand-by battery; wherein the bi-directional inverter comprises a cascade connection of an input bulk capacitor for sufficient energy storage to limit voltage ripple across the DC power source to a predetermined level, a line-filter for filtering the inverter input current to suppress the conducted and radiated switching noise produced by the inverter, and the bi-directional inverter power stage; and wherein the output filtering grid interface comprises an output filter, a fuse, and an output relay switching network for transferring power to either the utility grid or the stand-alone load. 6. The power supply of claim 1, wherein VERR serves as the commanding power input that is proportional to the average output power being transferred from the power converter to the utility grid and independent from the utility grid voltage; and further comprising a slow voltage-limiting error amplifier for providing active pull-down, through a first diode and an PNP transistor, of VERR when the RMS voltage across the stand-alone load or the RMS of the utility grid voltage exceeds a predetermined RMS value, while preserving the sinusoidal waveform of the AC inverter output current; a fast over-voltage shut-down circuit for providing a quick pull-down, through a second diode and the PNP transistor, of VERR to shut down the power converter stage when the voltage across the stand-alone load or the utility grid exceeds a predetermined instantaneous value; and an isolated voltage sense and scaling circuit that senses the rectified inverter output voltage with scaling factor KV with electrical isolation from the inverter output for feeding the input of both the slow voltage-limiting amplifier and the fast over-voltage shut-down circuit. 7. The power supply of claim 1, further comprising an over-current protection circuit for limiting the AC output current to a predetermined RMS value and preserving the sinusoidal waveform of the AC output current. 8. The power supply of claim 1, further comprising: one or more power semiconductors in a component selected from the component group consisting of the bi-directional inverter and the output filtering grid interface; and an over-temperature protection circuit for sensing the temperature of the one or more semiconductors and regulating the sensed temperature not to exceed a predetermined temperature by reducing the output power transferred to the utility grid or a stand-alone load. 9. The power supply of claim 1, further comprising: a transformer with two primary windings and two secondary windings, wherein the two primary windings are connected in series to provide an upper primary dotted terminal, a primary center tap terminal, and a lower primary un-dotted terminal, and wherein the two secondary windings are connected in series to provide an upper secondary dotted terminal, a secondary center-tap terminal, and a lower secondary un-dotted terminal; an output inductor having its negative terminal connected to the positive terminal of the output filtering grid interface and its positive terminal to a common node, to which the first set and the second set of unfolding unidirectional PWM switches are connected; a first set and a second set of unfolding unidirectional PWM switches, the first set directing positive current into the output filtering grid interface, and the second set for directing negative current into the utility grid; a first square-wave semiconductor switch having its DRAIN terminal connected to the upper primary dotted terminal of the transformer and its SOURCE terminal connected to the negative terminal of the DC input voltage; a second square-wave semiconductor switch having its DRAIN terminal connected to the lower primary un-dotted terminal of the transformer and its SOURCE terminal connected to the negative terminal of the DC input voltage; and a two-terminal bi-directional transient energy absorption circuit comprising two unidirectional transient energy absorption devices connected back-to-back in series, one of its terminals being connected to the common node and the other being connected to the secondary center-tap terminal of the transformer; wherein the first set of unfolding unidirectional PWM switches comprises an upper positive unfolding unidirectional switch and a lower positive unfolding unidirectional switch, the two positive unidirectional switches having their negative terminals tied together to the common node, the positive terminal of the upper positive unidirectional switch being connected to the upper secondary dotted terminal of the transformer, the positive terminal of the lower positive unidirectional switch being connected to the lower secondary undotted terminal of the transformer; wherein the second set of unfolding unidirectional PWM switches comprises an upper negative unfolding unidirectional switch and a lower negative unfolding unidirectional switch, the two negative unidirectional switches having their positive terminals tied together to the common node, the negative terminal of the upper negative unidirectional switch being connected to the upper secondary dotted terminal of the transformer, the negative terminal of the lower negative unidirectional switch being connected to the lower secondary undotted terminal of the transformer; wherein each of the four upper and lower unfolding unidirectional switches comprising a series connection of a diode and a semiconductor switch to form a unidirectional two-terminal switch having the series diode for enforcing unidirectional conduction of the corresponding semiconductor switch, wherein the primary center-tap terminal of the transformer is connected to the positive terminal of the DC input voltage; wherein the output filtering grid interface comprises the cascaded connection of an output filter, a fuse, and a relay switching network, the negative terminal of the output filtering grid interface being connected to the secondary center-tap terminal of the transformer and the positive terminal of the output filtering grid interface being connected to the negative terminal of the output inductor; and wherein the apparatus produces at most a two-semiconductor-switch voltage drop and a forward-bias voltage drop of only one diode at any switching state while the system is connected to the utility grid. 10. The power supply of claim 1, further comprising: a transformer having one primary winding, a first secondary winding, and a second secondary winding, wherein the first and second secondary windings are connected in series to provide an upper secondary dotted terminal, a secondary center-tap terminal, and a lower secondary un-dotted terminal; a first set and a second set of unfolding unidirectional PWM switches, the first set directing positive current into the output filtering grid interface and the second set directing negative current into the utility grid; an output inductor having its negative terminal connected to the positive terminal of the output filtering grid interface and its positive terminal to a common node, to which the first set and the second set of unfolding PWM switches are connected; a front-end switching bridge comprising first, second, third, and fourth square-wave semiconductor switches, the first and second square-wave semiconductor switches having their DRAIN terminals connected to the positive terminal of the DC input voltage, the SOURCE terminal of the first square-wave semiconductor switch being connected to the positive output terminal of the switching bridge, and the SOURCE terminal of the second square-wave semiconductor switch being connected to the negative output terminal of the switching bridge, the third and fourth square-wave semiconductor switches having their SOURCE terminals connected to the negative terminal of the DC input voltage, the DRAIN terminal of the third square-wave semiconductor switch being connected to the positive output terminal of the switching bridge, and the DRAIN terminal of the fourth square-wave semiconductor switch being connected to the negative output terminal of the front-end switching bridge; and a two-terminal bi-directional transient energy absorption circuit comprising two unidirectional transient energy absorption devices connected back-to-back in series, one of its terminals being connected to the common node and the other being connected to the secondary center-tap terminal of the transformer; wherein the output filtering grid interface comprises a cascaded connection of an output filter, a fuse, and a relay switching network, the negative terminal of the output filtering grid interface being connected to the secondary center-tap terminal of the transformer and the positive terminal of the output filtering grid interface being connected to the negative terminal of the output inductor; wherein the first set of unfolding unidirectional PWM switches comprises an upper positive unfolding unidirectional switch and a lower positive unfolding unidirectional switch, the two positive unidirectional switches having their negative terminals tied together to the common node, the positive terminal of the upper positive unidirectional switch being connected to the upper secondary dotted terminal of the transformer, the positive terminal of the lower positive unidirectional switch being connected to the lower secondary undotted terminal of the transformer; wherein the second set of unfolding unidirectional PWM switches comprises an upper negative unfolding unidirectional switch and a lower negative unfolding unidirectional switch, the two negative unidirectional switches having their positive terminals tied together to the common node, the negative terminal of the upper negative unidirectional switch being connected to the upper secondary dotted terminal of the transformer, the negative terminal of the lower negative unidirectional switch being connected to the lower secondary undotted terminal of the transformer; wherein each of the four upper and lower unfolding unidirectional switches comprises a series connection of a diode and a semiconductor switch to form a unidirectional two-terminal switch having the series diode for enforcing unidirectional conduction of the corresponding semiconductor switch, wherein the primary dotted terminal of the transformer is connected to the positive output terminal of the front-end switching bridge, and the primary un-dotted terminal of the transformer is connected to the negative output terminal of the front-end switching bridge; and wherein the apparatus produces at most a three-semiconductor-switch voltage drop and a forward-bias voltage drop of only one diode at any switching state while the system is connected to the utility grid. 11. The power supply of claim 1, further comprising: a transformer with two primary windings and two secondary windings, wherein the two primary windings are connected in series to provide an upper primary dotted terminal, a primary center tap terminal, and a lower primary un-dotted terminal, and wherein the two secondary windings are connected in series to provide an upper secondary dotted terminal, a secondary center-tap terminal, and a lower secondary un-dotted terminal; a first and a second unfolding bi-directional PWM switch, for directing positive and negative current into the utility grid; an output inductor that has their negative and positive terminals respectively connected to the positive terminal of the output filtering grid interface and a common node, to which the first and the second unfolding bi-directional PWM switches are connected; a first square-wave semiconductor switch having its DRAIN terminal connected to the upper primary dotted terminal of the transformer and its SOURCE terminal connected to the negative terminal of the DC input voltage; a second square-wave semiconductor switch having its DRAIN terminal connected to the lower primary un-dotted terminal of the transformer and its SOURCE terminal connected to the negative terminal of the DC input voltage; and a two-terminal bi-directional transient energy absorption circuit comprising two unidirectional transient energy absorption devices connected back-to-back in series, one of its terminals being connected to the common node and the other being connected to the secondary center-tap terminal of the transformer; wherein the output filtering grid interface comprises the cascaded connection of an output filter, a fuse, and a relay switching network, the negative terminal of the output filtering grid interface being connected to the secondary center-tap terminal of the transformer and the positive terminal of the output filtering grid interface being connected to the negative terminal of the output inductor; wherein the first unfolding bi-directional PWM switch comprises two semiconductor switches connected back-to-back in series forming a bi-directional two-terminal switch, wherein one of its two terminals is connected to the upper secondary dotted terminal of the transformer, and the other terminal is connected to the common node; wherein the second unfolding bi-directional PWM switch comprises two semiconductor switches connected back-to-back in series forming a bi-directional two-terminal switch, wherein one of its two terminals is connected to the lower secondary undotted terminal of the transformer, and the other terminal is connected to the common node wherein the primary center-tap terminal of the transformer is connected to the positive terminal of the DC input voltage; and wherein the apparatus produces at most a three-semiconductor-switch voltage drop and zero diode voltage drop at any switching state while the system is connected to the utility grid. 12. The power supply of claim 1, further comprising: a transformer having one primary winding, a first secondary winding, and a second secondary winding, wherein the first and second secondary windings are connected in series to provide an upper secondary dotted terminal, a secondary center-tap terminal, and a lower secondary un-dotted terminal; a first and a second unfolding bi-directional PWM switch, for directing positive and negative current into the utility grid; an output inductor having its negative terminal connected to the positive terminal of the output filtering grid interface and its positive terminal to a common node, to which the first and the second unfolding bi-directional PWM switches are connected; a front-end switching bridge comprising first, second, third, and fourth square-wave semiconductor switches, the first and second square-wave semiconductor switches having their DRAIN terminals connected to the positive terminal of the DC input voltage, the SOURCE terminal of the first square-wave semiconductor switch being connected to the positive output terminal of the switching bridge, and the SOURCE terminal of the second square-wave semiconductor switch being connected to the negative output terminal of the switching bridge, the third and fourth square-wave semiconductor switches having their SOURCE terminals connected to the negative terminal of the DC input voltage, the DRAIN terminal of the third square-wave semiconductor switch being connected to the positive output terminal of the switching bridge, and the DRAIN terminal of the fourth square-wave semiconductor switch being connected to the negative output terminal of the front-end switching bridge; and a two-terminal bi-directional transient energy absorption circuit comprising two unidirectional transient energy absorption devices connected back-to-back in series, one of its terminals being connected to the common node and the other being connected to the secondary center-tap terminal of the transformer; wherein the output filtering grid interface comprises a cascaded connection of an output filter, a fuse, and a relay switching network, the negative terminal of the output filtering grid interface being connected to the secondary center-tap terminal of the transformer and the positive terminal of the output filtering grid interface being connected to the output inductor; wherein the first unfolding bi-directional PWM switch comprises two semiconductor switches connected back-to-back in series forming a bi-directional two-terminal switch, wherein one of its two terminals is connected to the upper secondary dotted terminal of the transformer, and the other terminal is connected to the common node; wherein the second unfolding bi-directional PWM switch comprises two semiconductor switches connected back-to-back in series forming a bi-directional two-terminal switch, wherein one of its two terminals is connected to the lower secondary undotted terminal of the transformer, and the other terminal is connected to the common node wherein the primary dotted terminal of the transformer is connected to the positive output terminal of the front-end switching bridge, and the primary un-dotted terminal of the transformer is connected to the negative output terminal of the front-end switching bridge; and wherein the apparatus produces at most a four-semiconductor-switch voltage drop and zero diode voltage drop at any switching state while the system is connected to the utility grid. 13. The power supply of claim 1, further comprising: a transformer with a primary winding and a secondary winding; a back-end PWM switching bridge comprising: a first, a second, a third, and a fourth branch of unfolding bi-directional PWM switches, forming the four branches of the unfolding bi-directional PWM switches that are controlled to direct positive or negative current into the utility grid interface, a positive and negative input terminal serving as the input port of the back-end switching bridge, and a positive and a negative output terminal serving as the output port of the back-end switching bridge; an output inductor having its positive terminal connected to the positive output terminal of the back-end PWM switching bridge, and its negative terminal connected to the positive terminal of the output filtering grid interface; a front-end switching bridge comprising first, second, third, and fourth square-wave semiconductor switches, the first and second square-wave semiconductor switches being upper square-wave semiconductor switches that have their DRAIN terminals connected to the positive terminal of the DC input voltage, the SOURCE terminal of the first upper square-wave semiconductor switch being connected to the front-end positive output terminal of the switching bridge, and the SOURCE terminal of the second upper square-wave semiconductor switch being connected to the front-end negative output terminal of the switching bridge, the third and fourth square-wave semiconductor switches being lower square-wave semiconductor switches that have their SOURCE terminals connected to the negative terminal of the DC source, the DRAIN terminal of the third lower square-wave semiconductor switch being connected to the front-end positive output terminal, and the DRAIN terminal of the fourth lower square-wave semiconductor switch being connected to the front-end negative output terminal of the front-end switching bridge; and a two-terminal bi-directional transient energy absorption circuit comprising a first and a second unidirectional transient energy absorption device connected back-to-back in series, one of its terminals being connected to the positive output terminal of the back-end PWM switching bridge, and the other being connected to the negative output terminal of the back-end PWM switching bridge; wherein the output filtering grid interface comprises a cascaded connection of an output filter, a fuse, and a relay switching network, the negative terminal of the output filtering grid interface is connected to the negative output terminal of the back-end switching bridge, and the positive terminal of the output filtering grid interface is connected to the negative terminal of the output inductor; wherein each of the four branches of the unfolding bi-directional PWM switch of the back-end PWM switching bridge comprises two unidirectional PWM switches connected in parallel, each unidirectional PWM switch comprises a series connection of a diode and a semiconductor switch forming a unidirectional two-terminal switch having the series diode for enforcing unidirectional conduction of the corresponding semiconductor switch; wherein the two unidirectional switches are connected in parallel to form a branch of unfolding bi-directional PWM switch that allows two opposite directions of current flow, one direction through one unidirectional switch and the other direction through the other unidirectional switch; wherein the first and second branches of unfolding bi-directional PWM switch each has a first terminal connected to the dotted terminal of the secondary winding of the transformer, and the third and fourth branches of the unfolding bi-directional PWM switch each have a first terminal connected to the un-dotted terminal of the secondary winding of the transformer; wherein the second terminal of the first branch of unfolding bi-directional PWM switch is connected to the positive output terminal of the back-end PWM switching bridge, and the second terminal of the second branch of unfolding bi-directional PWM switch is connected to the negative output terminal of the back-end PWM switching bridge; wherein the second terminal of the third branch of unfolding bi-directional PWM switch is connected to the positive output terminal of the back-end PWM switching bridge, and the second terminal of the fourth branch of unfolding bi-directional PWM switch is connected to the negative output terminal of the back-end PWM switching bridge; wherein the dotted terminal of the primary winding of the transformer is connected to the positive output terminal of the front-end switching bridge, and the un-dotted terminal of the primary winding of the transformer is connected to the negative output terminal of the front-end switching bridge; and wherein the apparatus produces a four-semiconductor-switch voltage drop and a forward-bias voltage drop of only two diodes at any switching state while the system is connected to the utility grid. 14. The power supply of claim 1, further comprising: a transformer with a primary winding and a secondary winding; a back-end PWM switching bridge, comprising: a first, a second, a third, and a fourth unfolding bi-directional PWM switch, the four unfolding bi-directional PWM switches being controlled to direct positive or negative current into the output filtering grid interface, a positive and negative input terminal serving as the input port of the back-end switching bridge, and a positive and a negative output terminal serving as the output port of the back-end switching bridge; an output inductor connected between the positive output terminal of the back-end PWM switching bridge and the positive terminal of the output filtering grid interface; a front-end switching bridge comprising first, second, third, and fourth square-wave semiconductor switches, the first and second square-wave semiconductor switches being upper square-wave semiconductor switches that have their DRAIN terminals connected to the positive terminal of the DC input voltage, the SOURCE terminal of the first upper square-wave semiconductor switch being connected to the front-end positive output terminal of the switching bridge, and the SOURCE terminal of the second upper square-wave semiconductor switch being connected to the front-end negative output terminal of the switching bridge, the third and fourth square-wave semiconductor switches being lower square-wave semiconductor switches that have their SOURCE terminals connected to the negative terminal of the DC source, the DRAIN terminal of the third lower square-wave semiconductor switch being connected to the front-end positive output terminal, and the DRAIN terminal of the fourth lower square-wave semiconductor switch being connected to the front-end negative output terminal of the front-end switching bridge; and a two-terminal bi-directional transient energy absorption circuit comprising a first and a second unidirectional transient energy absorption device connected back-to-back in series, one of its terminals being connected to the positive output terminal of the back-end PWM switching bridge, and the other being connected to the negative output terminal of the back-end PWM switching bridge; wherein the output filtering grid interface comprises a cascaded connection of an output filter, a fuse, and a relay switching network, the negative terminal of the output filtering grid interface is connected to the negative output terminal of the back-end switching bridge, and the positive terminal of the output filtering interface is connected to the output inductor; wherein each of the four unfolding bi-directional PWM switches of the back-end PWM switching bridge comprises two semiconductor switches connected back-to-back in series; wherein the first and second unfolding bi-directional PWM switches each have a first terminal connected to the dotted terminal of the secondary winding of the transformer, and the third and fourth unfolding bi-directional PWM switches each have a first terminal connected to the un-dotted terminal of the secondary winding of the transformer; wherein the second terminal of the first unfolding bi-directional PWM switch is connected to the positive output terminal of the back-end PWM switching bridge, and the second terminal of the second unfolding bi-directional PWM switch is connected to the negative output terminal of the back-end PWM switching bridge; wherein the second terminal of the third unfolding bi-directional PWM switch is connected to the positive output terminal of the back-end PWM switching bridge, and the second terminal of the fourth unfolding bi-directional PWM switch is connected to the negative output terminal of the back-end PWM switching bridge; wherein the dotted terminal of the primary winding of the transformer is connected to the positive output terminal of the front-end switching bridge, and the un-dotted terminal of the primary winding of the transformer is connected to the negative output terminal of the front-end switching bridge; and wherein power flows from the DC source to the utility grid interface with active switch conduction loss of not more than a six-semiconductor-switch voltage drop, and the apparatus produces a zero-diode conduction loss or zero-diode forward-bias voltage drop at any switching state while the system is connected to the utility grid. 15. The power supply of claim 10, wherein the two square-wave semiconductor switches and the two sets of unfolding unidirectional PWM switches in the bi-directional inverter have their on and off states of switching as follows: the two square-wave semiconductor switches, Q5 and Q6, have complimentary on and off states of switching as a function of their respective switching drive signals, VGS5 and VGS6, which are functions of a square-wave signal, X, at a fixed switching frequency as VGS5= X and VGS6=X. the four semiconductor switches being distributed in the two sets of unfolding unidirectional PWM switches, Q1 to Q4, have their on and off switching states in a pulse-width modulated (PWM) fashion through their respective drive signals, VGS1, VGS2, VGS3, and VGS4, which are functions of a PWM signal, the square-wave signal X, and the output current direction signal Y, satisfying the following logical relations: description="In-line Formulae" end="lead"VGS1=( X+X��PWM)��Y,description="In-line Formulae" end="tail" description="In-line Formulae" end="lead"VGS2=(X+ X��PWM)�� Y,description="In-line Formulae" end="tail" description="In-line Formulae" end="lead"VGS3=(X+ X��PWM)��Y, anddescription="In-line Formulae" end="tail" description="In-line Formulae" end="lead"VGS4=( X+X��PWM)�� Y; anddescription="In-line Formulae" end="tail" wherein the PWM signal has its on and off switching state repeated at twice the switching frequency of signal X, and its on-state pulse-width is controlled by an analog signal Vcon of the system controller mentioned in claim 4 and Vcon is the output of the average current regulation controller within the system controller; wherein the output current direction signal Y represents the direction of the output current that has two logical states for controlling the output current to have a desired direction, one state for a positive direction and the other state for a negative direction, and is produced from the free-running waveform generator that is not synchronized with the utility grid voltage during a stand-alone mode, but is synchronized and in-phase with the utility grid voltage during a grid-tie mode of operation. 16. The power supply of claim 12, wherein the square-wave semiconductor switches and the two sets of unfolding bi-directional PWM switches have their on and off states of switching as follows: the two square-wave semiconductor switches, Q5 and Q6, have complementary on and off switch states being controlled by their respective complementary switching drive signals, VGS5 and VGS6, which are functions of a square-wave signal, X, at a fixed switching frequency as VGS5= X and VGS6=X; the four unfolding bi-directional PWM semiconductor switches, Q1 to Q4, have pulse-width modulated (PWM) on and off switching states as a function of their respective drive signals, VGS1, VGS2, VGS3, and VGS4, which are functions of a PWM signal, the X signal, and the output current direction signal Y, satisfying the following logical relations: description="In-line Formulae" end="lead"VGS1= (X⊕PWM)��Y,description="In-line Formulae" end="tail" description="In-line Formulae" end="lead"VGS2= (X⊕PWM)�� Y,description="In-line Formulae" end="tail" description="In-line Formulae" end="lead"VGS3=(X⊕PWM)��Y, anddescription="In-line Formulae" end="tail" description="In-line Formulae" end="lead"VGS4=(X⊕PWM)�� Y;description="In-line Formulae" end="tail" wherein the PWM signal has its on and off switching state repeated at twice the switching frequency of signal X, and its on-state pulse-width is varied as a function of the analog signal Vcon that is the output of the average current regulation controller mentioned in claim 4; wherein the Y signal is represents the direction of the output current that has two logical states for controlling the output current to have a desired direction, one state for a positive direction and the other state for a negative direction, and is produced from the free-running waveform generator that is not synchronized with the utility grid voltage during a stand-alone mode, but synchronized and in-phase with the utility grid voltage during a grid-tie mode of operation. 17. The power supply of claim 12, wherein the square-wave switches and the two sets of unfolding bi-directional PWM semiconductor switches have their on and off states of switching as follows: the two square-wave semiconductor switches, Q5 and Q6, have complementary on and off switch states being controlled by their respective complementary switching drive signals, VGS5 and VGS6, which are functions of a square-wave signal, X, at a fixed switching frequency as VGS5= X and VGS6=X; the four unfolding bi-directional PWM semiconductor switches, Q1 to Q4, have pulse-width modulated (PWM) on and off switching states as a function of their respective drive signals, VGS1, VGS2, VGS3, and VGS4, which are functions of a PWM signal and the X signal, satisfying the following logical relations: description="In-line Formulae" end="lead"VGS1=VGS2= (X⊕PWM), and VGS3=VGS4=(X⊕PWM); description="In-line Formulae" end="tail" wherein the above logical relations for the drive signals VGS1 to VGS4 for controlling the four unfolding bi-directional PWM semiconductor switches Q1 to Q4 are also used for controlling the four unfolding unidirectional PWM semiconductor switches; and wherein the above logical relations for the drive signals VGS1 to VGS4 for the four bi-directional switches Q1 to Q4 are also applied to the following eight drive signals of the eight bi-directional switches Q1 to Q4 and Q1B to Q4B distributedly belonging to the four unfolding PWM switches of the back-end PWM switching bridge as follows: description="In-line Formulae" end="lead"VGS1=VGS1B=VGS3 =VGS3B= (X⊕PWM), and VGS2=VGS2B=VGS4=V GS4B=(X⊕PWM).description="In-line Formulae" end="tail" 18. The power supply of claim 1, further comprising an over-current protection circuit for limiting the AC output current to a predetermined RMS value and preserving the sinusoidal waveform of the AC output current, and the system controller includes the average current regulation error amplifier circuit for producing their respective control analog signal, Vcon that is converted, through a pulse-width modulation (PWM) comparator and logic circuitry, into appropriate switching signals used for driving the semiconductor switches within the inverter power stage; wherein the average current regulation error amplifier and the subsequent PWM comparator and logic circuitry are replaced with different regulation circuits that employ one of the following control schemes: (1) the peak current-programmed control, (2) the hysteretic current regulation, and (3) the zero-current-turn-on and peak current turn-off control; wherein the said peak current-programmed control is a means for regulating the peak of the inverter output current to track the sinusoidal envelope of the reference sinusoidal waveform; wherein the said hysteretic current regulation is a means for regulating the peak and the trough of the inverter output current to track the two values corresponding to the upper and lower threshold values between which the sinusoidal reference current commanding signal resides in; and wherein the said zero-current turn-on and peak-current turn-off control is a means for regulating the peak of the inverter output current to track the sinusoidal envelope of the reference sinusoidal waveform and the trough of the inverter output current at zero current without zero-current dead-time.
Copyright KISTI. All Rights Reserved.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.