Packages for semiconductor light emitting devices utilizing dispensed encapsulants
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-029/22
H01L-029/02
H01L-033/00
H01L-029/227
H01L-029/24
H01L-023/02
출원번호
US-0197096
(2005-08-04)
등록번호
US-7365371
(2008-04-29)
발명자
/ 주소
Andrews,Peter
출원인 / 주소
Cree, Inc.
대리인 / 주소
Myers Bigel Sibley & Sajovec
인용정보
피인용 횟수 :
36인용 특허 :
19
초록▼
A submount for mounting an LED chip includes a substrate, a die attach pad configured to receive an LED chip on an upper surface of the substrate, a first meniscus control feature on the substrate surrounding the die attach pad and defining a first encapsulant region of the upper surface of the subs
A submount for mounting an LED chip includes a substrate, a die attach pad configured to receive an LED chip on an upper surface of the substrate, a first meniscus control feature on the substrate surrounding the die attach pad and defining a first encapsulant region of the upper surface of the substrate, and a second meniscus control feature on the substrate surrounding the first encapsulant region and defining a second encapsulant region of the upper surface of the substrate. The first and second meniscus control features may be substantially coplanar with the die attach pad. A packaged LED includes a submount as described above and further includes an LED chip on the die attach pad, a first encapsulant on the substrate within the first encapsulant region, and a second encapsulant on the substrate within the second encapsulant region and covering the first encapsulant.
대표청구항▼
What is claimed is: 1. A submount for mounting an LED, the submount comprising: a substrate having a planar upper surface; a die attach pad on the upper surface of the substrate, the die attach pad configured to receive an LED chip; a first meniscus control feature on the substrate, the first menis
What is claimed is: 1. A submount for mounting an LED, the submount comprising: a substrate having a planar upper surface; a die attach pad on the upper surface of the substrate, the die attach pad configured to receive an LED chip; a first meniscus control feature on the substrate, the first meniscus control feature comprising a first patterned film on the planar upper surface of the substrate surrounding the die attach pad, defining a first encapsulant region of the upper surface of the substrate, and being configured to limit the flow of a liquid encapsulant material across the substrate, wherein a portion of the planar upper surface of the substrate within the first encapsulant region is exposed; and a second meniscus control feature on the substrate, the second meniscus control feature comprising a second patterned film on the planar upper surface of the substrate surrounding the first encapsulant region, exposing and defining a second encapsulant region of the upper surface of the substrate including an exposed portion of the planar upper surface of the substrate between the first meniscus control feature and the second meniscus control feature, and being configured to limit the flow of a liquid encapsulant material across the substrate. 2. The submount of claim 1, wherein the substrate comprises a printed circuit board (PCB). 3. The submount of claim 1, wherein the die attach pad and the first and second meniscus control features comprise metal traces. 4. The submount of claim 1, wherein the first and/or second meniscus control features comprises a metal film. 5. The submount of claim 1, wherein the die attach pad and the first and second meniscus control features comprise the same material. 6. The submount of claim 5, wherein the first and/or second meniscus control features comprise a plated metal film or a polymer feature. 7. The submount of claim 1, wherein the die attach pad and the first and second meniscus control features are directly on the planar upper surface of the substrate. 8. The submount of claim 1, further comprising a wirebond pad on the planar upper surface of the substrate, the wirebond pad disposed within the second encapsulant region. 9. The submount of claim 1, wherein the substrate comprises a lower surface opposite the upper surface of the substrate, and wherein the submount further comprises an electrode on the lower surface of the substrate. 10. The submount of claim 9, further comprising a conductive via extending through the substrate from the electrode to the die attach pad. 11. The submount of claim 9, further comprising: a wirebond pad on the substrate, the wirebond pad disposed within the second encapsulant region; and a conductive via extending through the substrate from the electrode to the wirebond pad. 12. The submount of claim 1, further comprising an electrode on the upper surface of the substrate. 13. The submount of claim 12, wherein the electrode on the upper surface of the substrate and the first and second meniscus control features comprise the same material. 14. The submount of claim 12, wherein the substrate comprises a lower surface opposite the upper surface of the substrate, and the submount further comprises a lower electrode on the lower surface of the substrate and a conductive via extending through the substrate from the lower electrode to the electrode on the upper surface of the substrate. 15. The submount of claim 1, wherein the die attach pad and the first and second meniscus control features comprise metal traces and wherein the die attach pad further comprises a metal stack on the metal trace. 16. A submount for mounting an LED, the submount comprising: a substrate having a planar upper surface; a patterned film on the planar upper surface of the substrate, wherein the patterned film comprises: a portion configured to receive an LED chip; a first meniscus control feature on the planar upper surface of the substrate defining a first encapsulant region of the upper surface of the substrate and configured to limit the flow of an encapsulant material out of the first encapsulant region; and a second meniscus control feature on the planar upper surface of the substrate defining a second encapsulant region of the upper surface of the substrate and configured to limit the flow of an encapsulant material out of the second encapsulant region. 17. The submount of claim 16, wherein the patterned film comprises a conductive trace directly on the planar upper surface of the substrate. 18. The submount of claim 16, wherein the patterned film further comprises a wirebond pad disposed within the second encapsulant region. 19. The submount of claim 16, wherein the patterned film further comprises an electrode disposed outside the second encapsulant region.
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