[특허]Apparatus and methods for the inspection of objects

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	G06K-009/00 G06K-009/48 G06K-009/68
출원번호	US-0706489 (2003-11-12)
등록번호	US-7388978 (2008-06-17)
우선권정보	IL-131282(1999-08-05)
발명자 / 주소	Duvdevani,Sharon Gilat Bernshtein,Tally Klingbell,Eyal Mayo,Meir Rippa,Shmuel Smilansky,Zeev
출원인 / 주소	Orbotech Ltd.
대리인 / 주소	Ladas and Parry LLP
인용정보	피인용 횟수 : 21 인용 특허 : 26

초록 ▼

An electrical circuit inspection method including, for each of a plurality of types of local characteristics, each type occurring at least once within electrical circuitry to be inspected, identifying at least one portion of interest within the electrical circuitry whereat the local characteristic i

An electrical circuit inspection method including, for each of a plurality of types of local characteristics, each type occurring at least once within electrical circuitry to be inspected, identifying at least one portion of interest within the electrical circuitry whereat the local characteristic is expected to occur, and inspecting an image of each portion of interest, using an inspection task selected in response to the type of local characteristic expected to occur in the portion of interest.

대표청구항 ▼

The invention claimed is: 1. An electrical circuitry inspection method comprising: performing reference based inspection of electrical circuitry to be inspected, including: for each of a plurality of types of local characteristics, each type occurring at least once within said electrical circuitry

The invention claimed is: 1. An electrical circuitry inspection method comprising: performing reference based inspection of electrical circuitry to be inspected, including: for each of a plurality of types of local characteristics, each type occurring at least once within said electrical circuitry to be inspected, identifying at least one portion of interest within the electrical circuitry whereat said local characteristic is expected to occur; and inspecting an image of each of said at least one portion of interest, using a selected inspection task employing information defining said portion of interest and additional inspection information relevant to said portion of interest, said inspection task being selected from among a plurality of different inspection tasks in response to the type of local characteristic expected to occur in the portion of interest, said information defining said portion of interest comprising at least one of: binary Contour Element (CEL) data, identifying contour elements which correspond to borders between different regions in a pattern; and color CEL data, identifying contour elements which correspond to borders between different regions in a pattern and identifying a type of region on either side of a CEL. 2. Electrical circuitry apparatus comprising: a reference based inspector performing reference based inspection of electrical circuitry to be inspected, said reference based inspector including: a portion of interest identifier operative, for each of a plurality of types of local characteristics, each type occurring at least once within said electrical circuitry to be inspected, to identify at least one portion of interest within the electrical circuitry whereat said local characteristic is expected to occur; and an image inspector inspecting an image of each of said at least one portion of interest, using a selected inspection task employing information defining said portion of interest and additional inspection information relevant to said portion of interest, said inspection task being selected from among a plurality of different inspection tasks in response to the type of local characteristic expected to occur in the portion of interest, said information defining said portion of interest comprising at least one of: binary Contour Element (CEL) data, identifying contour elements which correspond to borders between different regions in a patter; and color CEL data, identifying contour elements which correspond to borders between different regions in a pattern and identifying a type of region on either side of a CEL. 3. A method according to claim 1, wherein said information defining said portion of interest further comprises: morphological feature inspection triggers; and color defect inspection triggers. 4. A method according to claim 1 and wherein said information defining said portion of interest comprises said binary CEL data. 5. A method according to claim 4 and wherein said binary CEL data is calculated as a function of a zero crossing point of Difference of Gaussians (DoGs). 6. A method according to claim 4 and wherein said binary CEL data is calculated for pattern edges in the Red band of an RGB image. 7. A method according to claim 1 and wherein said information defining said portion of interest comprises said color CEL data. 8. A method according to claim 7 and wherein said color CEL data includes representations of at least one of: x coordinate of a CEL, orientation of a CEL, direction of a CEL, a first endpoint location of a CEL along a pixel edge and a last endpoint location of a CEL along a pixel edge. 9. A method according to claim 7 and wherein said color CEL data includes representations of a color junction. 10. A method according to claim 1 and wherein said information defining said portion of interest comprises said morphological feature inspection triggers. 11. A method according to claim 1 and wherein said information defining said portion of interest comprises said color defect inspection triggers. 12. A method according to claim 1 and wherein said inspecting an image of each of said at least one portion of interest comprises: designing a rule scenario including inspecting said electrical circuitry with reference to a set of general design rules; learning a rule scenario including: learning the contents and structure of the design of said electrical circuitry; and generating a reference representation of said electrical circuitry having known desired attributes for use during the inspection of said electrical circuitry; and inspecting a rule scenario including inspecting electrical circuitry to determine defects with reference to said reference representation. 13. Apparatus according to claim 2, wherein said information defining said portion of interest further comprises: morphological feature inspection triggers; and color defect inspection triggers. 14. Apparatus according to claim 2 and wherein said information defining said portion of interest comprises said binary CEL data. 15. Apparatus according to claim 14 and wherein said binary CEL data is calculated as a function of a zero crossing point of Difference of Gaussians (DoGs). 16. Apparatus according to claim 14 and wherein said binary CEL data is calculated for pattern edges in the Red band of an RGB image. 17. Apparatus according to claim 2 and wherein said information defining said portion of interest comprises said color CEL data. 18. Apparatus according to claim 17 and wherein said color CEL data includes representations of at least one of: x coordinate of a CEL, orientation of a CEL and direction of a CEL, endpoint location of a CEL along a pixel edge. 19. Apparatus according to claim 17 and wherein said color CEL data includes representations of a color junction. 20. Apparatus according to claim 2 and wherein said image inspector comprises: a rule scenario designing functionality including inspection functionality operative to inspect said electrical circuitry with reference to a set of general design rules; a rule scenario learning functionality operative to learn the contents and structure of the design of said electrical circuitry and to generate a reference representation of said electrical circuitry having known desired attributes for use during the inspection of said electrical circuitry; and a rule scenario inspection functionality operative to inspect electrical circuitry to determine defects with reference to said reference representation.

LOADING...

이 특허에 인용된 특허 (26) 인용/피인용 타임라인 분석

Yolles Joel,ILX ; Aloni Meir,ILX ; Eran Yair,ILX ; Kaplan Haim,ILX, Apparatus and method for comparing and aligning two digital representations of an image.
상세보기
Aloni Meir (Herzliya ILX) Alon Amir (Yahud ILX) Eran Yair (Rehovot ILX) Katz Itzhak (Givat Shmuel ILX) Katzir Yigal (Holon ILX) Rosenfeld Gideon (Tel Aviv ILX), Apparatus and method for inspection of a patterned object by comparison thereof to a reference.
상세보기
Aloni Meir (Herzliya ILX) Alon Amir (Yahud ILX) Eran Yair (Rehovot ILX) Katz Itzhak (Givat Shmuel ILX) Katzir Yigal (Holon ILX) Rosenfeld Gideon (Tel Aviv ILX), Apparatus and method for inspection of a patterned object by comparison thereof to a reference.
상세보기
Kobayashi Shigeki (Kyoto JPX) Tanimura Yasuaki (Kyoto JPX) Yotsuya Teruhisa (Kyoto JPX), Apparatus for inspecting printed circuit boards and the like, and method of operating same.
상세보기
Caspi Amiran,ILX, Automatic visual inspection system.
상세보기
Caspi Amiran,ILX ; Smilansky Zeev,ILX, Automatic visual inspection system.
상세보기
Scola, Joseph; Jacobson, Lowell, Boundary analyzer.
상세보기
Irani Geoffrey B. (Columbia MD) Constantikes Kim T. (Ellicott City MD) Shiflett Gary D. (Columbia MD), Coherent correlation addition for increasing match information in scene matching navigation systems.
상세보기
Meisberger Dan (San Jose CA) Brodie Alan D. (Palo Alto CA) Desai Anil A. (San Jose CA) Emge Dennis G. (San Jose CA) Chen Zhong-Wei (Palo Alto CA) Simmons Richard (Los Altos CA) Smith Dave E. A. (San , Electron beam inspection system and method.
상세보기
Avraham Adler IL; Moshe Ben Shlomo IL, Illumination for inspecting surfaces of articles.
상세보기
Hopkins Brian M. (Mahonburg IEX), Image processing system for comparing a test article with a master article to determine that an object is correctly loca.
상세보기
Steven M. Whitman, Machine vision methods and articles of manufacture for ball grid array.
상세보기
Bachelder Ivan A., Machine vision methods for determining characteristics of an object using boundary points and bounding regions.
상세보기
Aoyama Yoshiyuki (Fugisawa JPX) Nakano Takahiro (Fugisawa JPX) Kanasashi Osamu (Ebina JPX), Method and apparatus for checking pattern.
상세보기
Driscoll ; Jr. Edward C. (Portola Valley CA) Martin Craig O. (Menlo Park CA) Ruby Kenneth (Florence OR) Russell James J. (Mountain View CA) Watson John G. (Menlo Park CA), Method and apparatus for verifying identity using image correlation.
상세보기
Spitz Glenn Steven, Method and apparatus supporting high speed evaluation of bar code indicia.
상세보기
Lapidot Zvi (Rehovot ILX), Method of and means for inspecting workpieces traveling along a production line.
상세보기
Tokita Masakazu (Fuji JPX) Kasahara Izumi (Numazu JPX), Method of checking pattern and apparatus therefor.
상세보기
Smilansky Zeev (Kfar Meishar ILX) Nissim Moshe (Raanana ILX) Harel Eyal (Tel Aviv ILX), Method of inspecting articles.
상세보기
Ahuja Narendra ; Tabb Mark D., Multiscale image edge and region detection method and apparatus.
상세보기
Chiu Chinchuan (New City NY) Oki Toru (Allendale NJ) Paolella Philip (Fort Lee NJ), Pattern searching method using neural networks and correlation.
상세보기
Wihl Tim S. (San Jose CA) Wihl Mark J. (San Jose CA), Photomask inspection apparatus and method using corner comparator defect detection algorithm.
상세보기
Zeev Smilansky IL; Sagie Tsadka IL; Zvi Lapidot IL; Rivi Sherman IL, Pixel based machine for patterned wafers.
상세보기
Kil David H. ; Shin Frances B. ; Rose David W., Surface anomaly-detection and analysis method.
상세보기
DeYong, Mark R.; Newberry, Jeff E.; Grace, John W.; Eskridge, Thomas C., System and method for dynamic image recognition.
상세보기
Kathleen Hennessey ; Youling Lin, System and method of optically inspecting structures on an object.
상세보기

이 특허를 인용한 특허 (21) 인용/피인용 타임라인 분석

Bishop, Craig; Bora, Vaibhav Joga Singh; Scanlan, Christopher M.; Olson, Timothy L., Automated optical inspection of unit specific patterning.
상세보기
Spitzer, Marc; Packer, John, Automatic generators for verilog programming.
상세보기
Kitamura, Tadashi; Ishikawa, Akio, Defect and critical dimension analysis systems and methods for a semiconductor lithographic process.
상세보기
Geva, Amir; Simonsson, Rutger; Stromback, Jan Henrik; Walach, Eugeniusz, Fast license plate verifier.
상세보기
Wang, Guang-Jian, Image correction system and method.
상세보기
Naruse, Takashi, Image measurement device, method for image measurement, and computer readable medium storing a program for image measurement.
상세보기
Yamane, Takeshi; Terasawa, Tsuneo; Tanaka, Toshihiko, Mask defect measurement method, mask quality determination and method, and manufacturing method of semiconductor device.
상세보기
Kwon, Sang-Hyuk; Yang, Kyoung-Ho; Park, Soon-Jae, Method and system for testing a display panel assembly.
상세보기
Young, Michael Yu Tak; Limb, Scott Jong Ho; Wong, William S.; Street, Robert A., Method of in-process intralayer yield detection, interlayer shunt detection and correction.
상세보기
Diederichs,Carsten; Lohweg,Volker; Sacher,J��rn; St��ber,Bernd R��diger; T��rke,Thomas; Willeke,Harald Heinrich, Methods for qualitative evaluation of a material with at least one identification characteristic.
상세보기
Kitamura, Tadashi; Hasebe, Toshiaki; Tsuneoka, Masatoshi, Pattern inspection apparatus and method.
상세보기
Kitamura, Tadashi; Hasebe, Toshiaki; Tsuneoka, Masotoshi, Pattern inspection apparatus and method.
상세보기
Kitamura, Tadashi; Hasebe, Toshiaki; Tsuneoka, Masotoshi, Pattern inspection apparatus and method.
상세보기
Kitamura, Tadashi; Kubota, Kazufumi; Nakazawa, Shinichi; Vohra, Neeti; Yamamoto, Masahiro, Pattern inspection apparatus and method.
상세보기
Kitamura, Tadashi; Kubota, Kazufumi; Nakazawa, Shinichi; Vohra, Neeti; Yamamoto, Masahiro; Hasebe, Toshiaki, Pattern inspection apparatus and method.
상세보기
Kitamura, Tadashi; Kubota, Kazufumi; Nakazawa, Shinichi; Vohra, Neeti; Yamamoto, Masahiro; Hasebe, Toshiaki, Pattern inspection apparatus and method.
상세보기
Yamamoto, Masahiro; Kitamura, Tadashi, Pattern inspection apparatus, pattern inspection method, and recording medium.
상세보기
Hammoud, Amer, Self-presenting report.
상세보기
Kitamura, Tadashi; Ishikawa, Akio, System and method for a semiconductor lithographic process control using statistical information in defect identification.
상세보기
Daisy, Kyran, Systems, methods, and media for creating multiple layers from an image.
상세보기
Daisy, Kyran, Systems, methods, and media for creating multiple layers from an image.
상세보기

활용도 분석정보

상세보기

다운로드

내보내기

활용도 Top5 특허

해당 특허가 속한 카테고리에서 활용도가 높은 상위 5개 콘텐츠를 보여줍니다.
더보기 버튼을 클릭하시면 더 많은 관련자료를 살펴볼 수 있습니다.

IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

내보내기 구분	파일저장 인쇄 메일전송
구성항목	기본정보 상세정보 관리번호, 국가코드, 자료구분, 상태, 출원번호, 출원일자, 공개번호, 공개일자, 등록번호, 등록일자, 발명명칭(한글), 발명명칭(영문), 출원인(한글), 출원인(영문), 출원인코드, 대표IPC 관리번호, 국가코드, 자료구분, 상태, 출원번호, 출원일자, 공개번호, 공개일자, 공고번호, 공고일자, 등록번호, 등록일자, 발명명칭(한글), 발명명칭(영문), 출원인(한글), 출원인(영문), 출원인코드, 대표출원인, 출원인국적, 출원인주소, 발명자, 발명자E, 발명자코드, 발명자주소, 발명자 우편번호, 발명자국적, 대표IPC, IPC코드, 요약, 미국특허분류, 대리인주소, 대리인코드, 대리인(한글), 대리인(영문), 국제공개일자, 국제공개번호, 국제출원일자, 국제출원번호, 우선권, 우선권주장일, 우선권국가, 우선권출원번호, 원출원일자, 원출원번호, 지정국, Citing Patents, Cited Patents
저장형식	Text(ASCII format) Excel format PIAS분석(.xls)
메일정보	받는사람 (필수) @ 보내는사람 (선택) @ 제목 내용 KISTI 검색결과 이메일 서비스
안내	총 건의 자료가 검색되었습니다. 다운받으실 자료의 인덱스를 입력하세요. (1-10,000) 검색결과의 순서대로 최대 10,000건 까지 다운로드가 가능합니다. 데이타가 많을 경우 속도가 느려질 수 있습니다.(최대 2~3분 소요) 다운로드 파일은 UTF-8 형태로 저장됩니다. 파일의 내용이 제대로 보이지 않을실 때는 웹브라우저 상단의 보기 -> 인코딩 -> 자동선택 여부를 확인하십시오. ~ Text(ASCII format) Excel format

연합인증

[미국특허] Apparatus and methods for the inspection of objects 원문보기

초록 ▼

대표청구항 ▼

연구과제 타임라인

이 특허에 인용된 특허 (26) 인용/피인용 타임라인 분석

이 특허를 인용한 특허 (21) 인용/피인용 타임라인 분석

활용도 분석정보

활용도 Top5 특허

관련 콘텐츠

특허 원문 보기

IPC 상위 출원인

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

선택된 텍스트

연합인증

[미국특허] Apparatus and methods for the inspection of objects 원문보기

초록 ▼

대표청구항 ▼

연구과제 타임라인

전체(0) 논문(0) 특허(0) 보고서(0)

전체(0) 논문(0) 특허(0) 보고서(0)

이 특허에 인용된 특허 (26) 인용/피인용 타임라인 분석

이 특허를 인용한 특허 (21) 인용/피인용 타임라인 분석

활용도 분석정보

활용도 Top5 특허 더보기

관련 콘텐츠

특허 원문 보기

IPC 상위 출원인

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

선택된 텍스트

활용도 Top5 특허