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Method and apparatus for autonomically initiating measurement of secondary metrics based on hardware counter values for primary metrics 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-011/16
출원번호 US-0757269 (2004-01-14)
등록번호 US-7392370 (2008-06-24)
발명자 / 주소
  • DeWitt, Jr.,Jimmie Earl
  • Levine,Frank Eliot
  • Richardson,Christopher Michael
  • Urquhart,Robert John
출원인 / 주소
  • International Business Machines Corporation
대리인 / 주소
    Yee,Duke W.
인용정보 피인용 횟수 : 11  인용 특허 : 75

초록

A method, apparatus, and computer instructions in a data processing system for processing instructions are provided. Instructions are received at a processor in the data processing system. If a selected indicator is associated with the instruction, counting of each event associated with the executio

대표청구항

What is claimed is: 1. A method in a data processing system for processing instructions, the method comprising: responsive to receiving an instruction at a processor in the data processing system, determining whether an indicator is associated with the instruction, wherein the indicator identifies

이 특허에 인용된 특허 (75)

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  45. Smolders Luc Rene, Method and system for software instruction level tracing in a data processing system.
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  51. Vasanth Bala, Method for selecting active code traces for translation in a caching dynamic translator.
  52. Faraboschi Paolo ; Raje Prasad, Method for storing and decoding instructions for a microprocessor having a plurality of function units.
  53. Jones, Scott Thomas; Levine, Frank Eliot; Smolders, Luc Rene; Urquhart, Robert John, Method, apparatus and computer program product for efficient per thread performance information.
  54. Luk,Chi Keung; Lowney,Geoff, Methods and apparatus for stride profiling a software application.
  55. Hooker, Rodney E., Microprocessor with repeat prefetch instruction.
  56. Callahan, II, Charles David; Shields, Keith Arnett; Briggs, III, Preston Pengra, Parallelism performance analysis based on execution trace information.
  57. Levine Frank Eliot ; Roth Charles Philip ; Welbon Edward Hugh ; Randolph Jack Chris, Performance monitoring in a data processing system.
  58. Levine Frank Eliot ; Moore Roy Stuart ; Roth Charles Philip ; Welbon Edward Hugh, Performance monitoring of cache misses and instructions completed for instruction parallelism analysis.
  59. Witt, David B., Processor including efficient fetch mechanism for L0 and L1 caches.
  60. Kaneshiro Shaun ; Hagiwara Junichi,JPX ; Shindo Tatsuya,JPX, Profile instrumentation method and profile data collection method.
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  67. James S. Mattson, Jr. ; Richard F. Man, System and method for data coverage analysis of a computer program.
  68. Levine Frank Eliot ; Moore Roy Stuart ; Roth Charles Philip ; Welbon Edward Hugh, System and method for performance monitoring of instructions in a re-order buffer.
  69. Dean Mark E. (Austin TX), System and method for prefetching information in a processing system.
  70. John ; Jr. Chester Charles ; Urquhart Robert J., System and method for tracing instructions in an information handling system without changing the system source code.
  71. Choquier, Philippe; Clark, Quentin J.; Devlin, William D.; Dillingham, Lara N.; Ferroni, Cameron J. A.; Grant, Justin; Limprecht, Rodney T.; Ludeman, John F.; Mallet, Alexander E.; Multerer, Boyd C.;, System and method providing virtual applications architecture.
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  73. Subrahmanyam Pratap, Transparent instrumentation for computer program behavior analysis.
  74. Hundt,Robert; Ramasamy,Vinodha, Unwinding instrumented program code.
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이 특허를 인용한 특허 (11)

  1. Johnson, Mark W.; Zavalney, Paul; Grannæs, Marius; Loe, Oeivind A. G., Apparatus for information processing with loop cache and associated methods.
  2. DeWitt, Jr., Jimmie E.; Levine, Frank E.; Richardson, Christopher M.; Urquhart, Robert J., Autonomic hardware assist for patching code.
  3. DeWitt, Jr., Jimmie Earl; Levine, Frank Eliot; Pineda, Enio Manuel; Richardson, Christopher Michael; Urquhart, Robert John, Counting instruction execution and data accesses.
  4. Dierks, Jr., Herman D.; Herrera, Andres; King-Smith, Bernard A.; Lam, Kiet H., Ganged hardware counters for coordinated rollover and reset operations.
  5. DeWitt, Jr., Jimmie Earl; Levine, Frank Eliot; Richardson, Christopher Michael; Urquhart, Robert John, Method and system for autonomic execution path selection in an application.
  6. Ben-Yehuda, Shmuel; Klausner, Moshe, Operating system aided code coverage.
  7. Yamazaki, Iwao; Hara, Michiharu; Yamanaka, Eiji, Processing apparatus and method for acquiring log information.
  8. DeWitt, Jr., Jimmie Earl; Levine, Frank Eliot; Richardson, Christopher Michael; Urquhart, Robert John, Qualifying collection of performance monitoring events by types of interrupt when interrupt occurs.
  9. Bose, Pradip; Buyuktosunoglu, Alper; Isci, Canturk; Kephart, Jeff; Meng, Xiaoqiao; Sarikaya, Ruhi, Virtualized abstraction with built-in data alignment and simultaneous event monitoring in performance counter based application characterization and tuning.
  10. Cola-Robles, Erik C.; Neiger, Gilbert; Bennett, Steven M.; Anderson, Andrew V., Virtualizing performance counters.
  11. Cota-Robles, Erik C.; Neiger, Gilbert; Bennett, Steven M.; Anderson, Andrew V., Virtualizing performance counters.
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