IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0894529
(2004-07-20)
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등록번호 |
US-7404020
(2008-07-22)
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발명자
/ 주소 |
- Dropps,Frank R.
- Gustafson,William J.
- Haseman,Leonard W.
|
출원인 / 주소 |
|
대리인 / 주소 |
Klein, O'Neill & Singh, LLP
|
인용정보 |
피인용 횟수 :
2 인용 특허 :
117 |
초록
▼
A fibre channel switch element with an integrated fabric controller on a single chip is provided. The fabric controller including a processor module that can control various switch element functions; a serlizer/de-serializer for converting parallel data to serial data for transmission; an on-chip pe
A fibre channel switch element with an integrated fabric controller on a single chip is provided. The fabric controller including a processor module that can control various switch element functions; a serlizer/de-serializer for converting parallel data to serial data for transmission; an on-chip peripheral bus that allows communication between plural components and the processor module; a processor local bus and an interrupt controller that provides interrupts to the processor module. The integrated fabric controller also includes a flash controller and an external memory controller; an Ethernet controller; a Universal Asynchronous Receiver Transmitter ("UART") module that performs serial to parallel conversion and vice-versa; an I2C module that performs serial to parallel and parallel to serial conversion; a general-purpose input/output interface; a real time clock module; an interrupt controller that can receive interrupts inputs from both internal and external sources; and a bridge to an internal PCI bus.
대표청구항
▼
What is claimed is: 1. A fibre channel switch element, comprising: a plurality of ports to receive and transmit fibre channel frames: and a fabric controller embedded on a same chip as the plurality of ports to configure and to initialize the fibre channel switch element, to configure the plurality
What is claimed is: 1. A fibre channel switch element, comprising: a plurality of ports to receive and transmit fibre channel frames: and a fabric controller embedded on a same chip as the plurality of ports to configure and to initialize the fibre channel switch element, to configure the plurality of ports, to monitor the fibre channel switch element, to manage at least a link state machine and a loop state machine and to process name server requests, the embedded fabric controller comprising: a processor module to control a plurality of switch element functions, wherein the processor module includes a core module, a trace module to trace program counters, a first cache to store program instructions and a second cache to enable data transfers; a serializer/de-serializer to convert parallel data to serial data for transmission; and to convert received serial data to parallel data; a device control register (DCR) bus that transfers data between the processor module and a plurality of registers to configure a static dynamic random access memory (SDRAM) controller, an external bus controller and (EBC), an arbitration module, a universal interrupt controller, an Ethernet Controller and a real time clock module; a processor local bus to access an external memory via the EBC; an on-chip peripheral bus to allow communication between the processor module and at least one or more of a universal asynchronous receiver transmitter (UART) module, a general purpose input and output interface (GPIO), the Ethernet controller, a plurality of modules coupled to the processor local bus; a bus that couples a control port of the fibre channel switch element to the processor local bus via a bridge; a processor local bus and the universal interrupt controller interfacing with the DCR bus provides interrupts to the processor module regarding control, status and communication between a plurality of the fibre channel switch element modules. 2. The switch element of claim 1, wherein the embedded fabric controller includes a flash that provides access to the processor module to an external flash device via the external bus controller. 3. The switch element of claim 1, wherein the external memory includes one or more of a synchronous dynamic random access memory, a read only memory, and a flash memory device. 4. The switch element of claim 1, wherein the Ethernet controller for the embedded fabric controller includes a media access controller to interface with a physical Ethernet laver and the on chip peripheral bus. 5. The switch element of claim 1, wherein the ("UART") UART module for the embedded fabric controller is operationally coupled to the on chip peripheral bus and performs serial to parallel conversion on data received from an external and parallel to serial conversion of data received from the processor module. 6. The switch element of claim 1, wherein the embedded fabric controller includes an 12C module that performs serial to parallel conversion on data received from an external 12C device and parallel to serial conversion of data received from the processor module. 7. The switch element of claim 1, wherein the certain bits for the general-purpose input/output interface of the embedded fabric controller are used to control and to configure a light emitting diode (LED) module to control when a plurality of LEDs are turned on and turned off; and a module within the control port obtains system configure information from the LED module. 8. The switch element of claim 1, wherein the embedded fabric controller includes a real time clock module that provides a reference clock for the fibre channel switch element. 9. The switch element of claim 8, wherein the real time clock module includes a battery back-up module so that the real time clock module continues to keep time when input power is unavailable. 10. The switch element of claim 1, wherein the general-purpose input/output interface for the embedded controller is used to monitor and to control components external to the fibre channel switch element. 11. The switch element of claim 1, further comprises: a reset switch de-bounce circuit to reset the fibre channel switch element by resetting certain bits in a register for the processor module, by using a watchdog timer or by writing to certain registers for the GPIO. 12. The switch element of claim 1, wherein the an universal interrupt controller for the embedded fabric controller that can receives inputs from modules internal to the fibre channel switch element and modules external to the fibre channel switch element for generating interrupts to the processor module. 13. The switch element of claim 1, wherein the bridge coupled to the bus is a PCI bridge and the bus is a PCI bus. 14. The switch element of claim 13, wherein the PCI bus is synchronous with other bus clocks of the switch element without using a bus synchronizer. 15. The switch element of claim 13, wherein the local processor bus operates at twice the frequency of the PCI bus. 16. The switch element of claim 2, wherein the flash device is a NAND flash device or a NOR flash device operating at different data widths. 17. The switch element of claim 1, wherein the SDRAM controller interfaces with a bus control module that repositions data onto the processor local bus for the external memory read operations. 18. The switch element of claim 1, wherein the arbitration module controls access to the processor local bus by arbitrating between a plurality of modules. 19. The switch element of claim 1, wherein the EBC, the SDRAM controller, the bridge and the on chip peripheral bus operate as slaves for the processor local bus while the processor module operates as a master for tile processor local bus integrated fabric.
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