A semiconductor integrated circuit having a high withstand voltage TFT and a TFT which is capable of operating at high speed in a circuit of thin film transistors (TFT) and methods for fabricating such circuit will be provided. A gate insulating film of the TFT required to operate at high speed (e.g
A semiconductor integrated circuit having a high withstand voltage TFT and a TFT which is capable of operating at high speed in a circuit of thin film transistors (TFT) and methods for fabricating such circuit will be provided. A gate insulating film of the TFT required to operate at high speed (e.g., TFT used for a logic circuit) is relatively thinned less than a gate insulating film of the TFT which is required to have high withstand voltage (e.g., TFT used for switching high voltage signals).
대표청구항▼
What is claimed is: 1. A semiconductor device comprising at least a display device, said display device comprising: a substrate having an insulating surface; a semiconductor layer over the substrate, said semiconductor layer including at least a channel region; a first insulating film comprising si
What is claimed is: 1. A semiconductor device comprising at least a display device, said display device comprising: a substrate having an insulating surface; a semiconductor layer over the substrate, said semiconductor layer including at least a channel region; a first insulating film comprising silicon oxide formed over the semiconductor layer; a second insulating film comprising silicon nitride formed over the first insulating film; a gate electrode located over the channel region of the semiconductor layer with the first insulating film and the second insulating film interposed therebetween; a third insulating film comprising silicon nitride formed over the semiconductor layer, the first and second insulating films and the gate electrode; and a pixel electrode formed over said third insulating film wherein said pixel electrode is electrically connected to the semiconductor layer, wherein said second insulating film extends beyond edges of the gate electrode; wherein said first insulating film extends beyond edges of the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of an extending portion of the first insulating film and an upper surface of an extending portion of the second insulating film. 2. A semiconductor device comprising at least a display device, said display device comprising: a substrate having an insulating surface; a semiconductor layer over the substrate, said semiconductor layer including at least a pair of impurity regions and a channel region; a first insulating film comprising silicon oxide formed over the semiconductor layer; a second insulating film comprising silicon nitride formed over the first insulating film; a gate electrode located over the channel region of the semiconductor layer with the first insulating film and the second insulating film interposed therebetween; a third insulating film comprising silicon nitride formed over the semiconductor layer, the first and second insulating films and the gate electrode, said third insulating film having at least one contact hole; at least one of source and drain electrodes formed over said third insulating film; and a pixel electrode formed over said third insulating film wherein said pixel electrode is electrically connected to one of said pair of impurity regions, wherein said second insulating film extends beyond edges of the gate electrode, wherein said first insulating film extends beyond edges of the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of an extending portion of the first insulating film and an upper surface of an extending portion of the second insulating film, and wherein said one of the source and drain electrodes is electrically connected to one of said pair of impurity regions through the contact hole, and wherein said one of the source and drain electrodes is not in direct contact with the second insulating film. 3. A semiconductor device comprising at least a display device, said display device comprising: a substrate having an insulating surface; a semiconductor layer over the substrate, said semiconductor layer including at least a channel region; a first insulating film comprising silicon oxide formed over the semiconductor layer; a second insulating film comprising silicon nitride formed over the first insulating film; a gate electrode located over the channel region of the semiconductor layer with the first insulating film and the second insulating film interposed therebetween; a third insulating film comprising silicon nitride formed over the semiconductor layer, the first and second insulating films and the gate electrode; and a pixel electrode formed over said third insulating film wherein said pixel electrode is electrically connected to the semiconductor layer, wherein said second insulating film extends beyond edges of the gate electrode; wherein said first insulating film extends beyond edges of the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of an extending portion of the first insulating film and an upper surface of an extending portion of the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of the gate electrode and side surfaces of the gate electrode. 4. A semiconductor device comprising at least a display device, said display device comprising: a substrate having an insulating surface; a semiconductor layer over the substrate, said semiconductor layer including at least a pair of impurity regions and at least one lightly doped impurity region between the channel region and one of the pair of impurity regions; a first insulating film comprising silicon oxide formed over the semiconductor layer; a second insulating film comprising silicon nitride formed over the first insulating film; a gate electrode located over the channel region of the semiconductor layer with the first insulating film and the second insulating film interposed therebetween; a third insulating film comprising silicon nitride formed over the semiconductor layer, the first and second insulating films and the gate electrode; and a pixel electrode formed over said third insulating film wherein said pixel electrode is electrically connected to one of said pair of impurity regions, wherein said second insulating film extends beyond edges of the gate electrode; wherein said first insulating film extends beyond edges of the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of an extending portion of the first insulating film and an upper surface of an extending portion of the second insulating film, wherein said second insulating film overlaps said lightly doped impurity region. 5. A semiconductor device comprising at least a display device, said display device comprising: a substrate having an insulating surface; a semiconductor layer over the substrate, said semiconductor layer including at least a pair of impurity regions and a channel region; a first insulating film comprising silicon oxide formed over the semiconductor layer; a second insulating film comprising silicon nitride formed over the first insulating film; a gate electrode located over the channel region of the semiconductor layer with the first insulating film and the second insulating film interposed therebetween; a third insulating film comprising silicon nitride formed over the semiconductor layer, the first and second insulating films and the gate electrode, said third insulating film having at least one contact hole; at least one of source and drain electrodes formed over said third insulating film, wherein said second insulating film extends beyond edges of the gate electrode; and a pixel electrode formed over said third insulating film wherein said pixel electrode is electrically connected to one of said pair of impurity regions, wherein said first insulating film extends beyond edges of the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of an extending portion of the first insulating film and an upper surface of an extending portion of the second insulating film, and wherein said one of the source and drain electrodes is electrically connected to one of said pair of impurity regions through the contact hole, and wherein said one of the source and drain electrodes is not in direct contact with the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of the gate electrode and side surfaces of the gate electrode. 6. A semiconductor device comprising at least a display device, said display device comprising: a substrate having an insulating surface; a semiconductor layer over the substrate, said semiconductor layer including at least a pair of impurity regions and a channel region; a first insulating film comprising silicon oxide formed over the semiconductor layer; a second insulating film comprising silicon nitride formed over the first insulating film; a gate electrode located over the channel region of the semiconductor layer with the first insulating film and the second insulating film interposed therebetween; a third insulating film comprising silicon nitride formed over the semiconductor layer, the first and second insulating fihns and the gate electrode; a fourth insulating film formed over said third insulating film comprises an organic resin; a pixel electrode formed over said fourth insulating film wherein said pixel electrode is electrically connected to one of said pair of impurity regions, wherein said second insulating film extends beyond edges of the gate electrode; wherein said first insulating film extends beyond edges of the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of an extending portion of the first insulating film and an upper surface of an extending portion of the second insulating film. 7. A semiconductor device comprising at least a display device, said display device comprising: a substrate having an insulating surface; a semiconductor layer over the substrate, said semiconductor layer including at least a pair of impurity regions and a channel region; a first insulating film comprising silicon oxide formed over the semiconductor layer; a second insulating film comprising silicon nitride formed over the first insulating film; a gate electrode located over the channel region of the semiconductor layer with the first insulating film and the second insulating film interposed therebetween; a third insulating film comprising silicon nitride formed over the semiconductor layer, the first and second insulating films and the gate electrode, said third insulating film having at least one contact hole, at least one of source and drain electrodes formed over said third insulating film; a fourth insulating film formed over said third insulating film comprises an organic resin; a pixel electrode formed over said fourth insulating film wherein said pixel electrode is electrically connected to one of said pair of impurity regions, wherein said second insulating film extends beyond edges of the gate electrode; wherein said first insulating film extends beyond edges of the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of an extending portion of the first insulating film and an upper surface of an extending portion of the second insulating film, and wherein said one of the source and drain electrodes is electrically connected to one of said pair of impurity regions though the contact hole, and wherein said one of the source and drain electrodes is not in direct contact with the second insulating film. 8. A semiconductor device comprising at least a display device, said display device comprising: a substrate having an insulating surface; a semiconductor layer over the substrate, said semiconductor layer including at least a pair of impurity regions and a channel region; a first insulating film comprising silicon oxide formed over the semiconductor layer; a second insulating film comprising silicon nitride formed over the first insulating film; a gate electrode located over the channel region of the semiconductor layer with the first insulating film and the second insulating film interposed therebetween; a third insulating film comprising silicon nitride formed over the semiconductor layer, the first and second insulating films and the gate electrode; a fourth insulating film formed over said third insulating film comprises an organic resin; a pixel electrode formed over said fourth insulating film wherein said pixel electrode is electrically connected to one of said pair of impurity regions, wherein said second insulating film extends beyond edges of the gate electrode; wherein said first insulating film extends beyond edges of the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of an extending portion of the first insulating film and an upper surface of an extending portion of the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of the gate electrode and side surfaces of the gate electrode. 9. A semiconductor device comprising at least a display device, said display device comprising: a substrate having an insulating surface; a semiconductor layer over the substrate, said semiconductor layer including at least a pair of impurity regions and at least one lightly doped impurity region between the channel region and one of the pair of impurity regions; a first insulating film comprising silicon oxide formed over the semiconductor layer; a second insulating film comprising silicon nitride formed over the first insulating film; a gate electrode located over the channel region of the semiconductor layer with the first insulating film and the second insulating film interposed therebetween; a third insulating film comprising silicon nitride formed over the semiconductor layer, the first and second insulating films and the gate electrode; a fourth insulating film formed over said third insulating film comprises an organic resin; a pixel electrode formed over said fourth insulating film wherein said pixel electrode is electrically connected to one of said pair of impurity regions, wherein said second insulating film extends beyond edges of the gate electrode, wherein said first insulating film extends beyond edges of the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of an extending portion of the first insulating film and an upper surface of an extending portion of the second insulating film, wherein said second insulating film overlaps said lightly doped impurity region. 10. A semiconductor device comprising at least a display device, said display device comprising: a substrate having an insulating surface; a semiconductor layer over the substrate, said semiconductor layer including at least a pair of impurity regions and a channel region; a first insulating film comprising silicon oxide formed over the semiconductor layer; a second insulating film comprising silicon nitride formed over the first insulating film; a gate electrode located over the channel region of the semiconductor layer with the first insulating film and the second insulating film interposed therebetween; a third insulating film comprising silicon nitride formed over the semiconductor layer, the first and second insulating films and the gate electrode, said third insulating film having at least one contact hole; at least one of source and drain electrodes formed over said third insulating film; a fourth insulating film formed over said third insulating film comprises an organic resin; a pixel electrode formed over said fourth insulating film wherein said pixel electrode is electrically connected to one of said pair of impurity regions, wherein said second insulating film extends beyond edges of the gate electrode, wherein said first insulating film extends beyond edges of the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of an extending portion of the first insulating film and an upper surface of an extending portion of the second insulating film, and wherein said one of the source and drain electrodes is electrically connected to one of said pair of impurity regions through the contact hole, and wherein said one of the source and drain electrodes is not in direct contact with the second insulating film, and wherein said third insulating film is in direct contact with an upper surface of the gate electrode and side surfaces of the gate electrode. 11. A semiconductor device according to any one of claim 1, further comprising a fourth insulating film formed over said third insulating film, wherein said fourth insulating film comprises an organic resin. 12. A semiconductor device according to any one of claim 2, further comprising a fourth insulating film formed over said third insulating film, wherein said fourth insulating film comprises an organic resin. 13. A semiconductor device according to any one of claim 3, further comprising a fourth insulating film formed over said third insulating film, wherein said fourth insulating film comprises an organic resin. 14. A semiconductor device according to any one of claim 4, further comprising a fourth insulating film formed over said third insulating film, wherein said fourth insulating film comprises an organic resin. 15. A semiconductor device according to any one of claim 5, further comprising a fourth insulating film formed over said third insulating film, wherein said fourth insulating film comprises an organic resin. 16. A semiconductor device according to claim 1, wherein said semiconductor layer includes a pair of impurity regions, wherein said semiconductor layer includes at least one lightly doped impurity region between the channel region and one of the pair of impurity regions. 17. A semiconductor device according to any one of claim 2, wherein said second insulating film at least partly overlaps one lightly doped impurity region between the channel region and one of the pair of impurity regions. 18. A semiconductor device according to any one of claim 3, wherein said second insulating film at least partly overlaps one lightly doped impurity region between the channel region and one of the pair of impurity regions. 19. A semiconductor device according to any one of claim 5, wherein said second insulating film at least partly overlaps one lightly doped impurity region between the channel region and one of the pair of impurity regions. 20. A semiconductor device according to any one of claim 7, wherein said second insulating film at least partly overlaps one lightly doped impurity region between the channel region and one of the pair of impurity regions. 21. A semiconductor device according to any one of claim 8, wherein said second insulating film at least partly overlaps one lightly doped impurity region between the channel region and one of the pair of impurity regions. 22. A semiconductor device according to any one of claim 10, wherein said second insulating film at least partly overlaps one lightly doped impurity region between the channel region and one of the pair of impurity regions. 23. A semiconductor device according to any one of claim 1, wherein said display comprises a driving circuit formed over said substrate. 24. A semiconductor device according to any one of claim 2, wherein said display comprises a driving circuit formed over said substrate. 25. A semiconductor device according to any one of claim 3, wherein said display comprises a driving circuit formed over said substrate. 26. A semiconductor device according to any one of claim 4, wherein said display comprises a driving circuit formed over said substrate. 27. A semiconductor device according to any one of claim 5, wherein said display comprises a driving circuit formed over said substrate. 28. A semiconductor device according to any one of claim 6, wherein said display comprises a driving circuit formed over said substrate. 29. A semiconductor device according to any one of claim 7, wherein said display comprises a driving circuit formed over said substrate. 30. A semiconductor device according to any one of claim 8, wherein said display comprises a driving circuit formed over said substrate. 31. A semiconductor device according to any one of claim 9, wherein said display comprises a driving circuit formed over said substrate. 32. A semiconductor device according to any one of claim 10, wherein said display comprises a driving circuit formed over said substrate. 33. A semiconductor device according to any one of claim 1, wherein said semiconductor device is one selected a group consisting of: video movie, digital camera, car navigation system, personal computer and projector. 34. A semiconductor device according to any one of claim 2, wherein said semiconductor device is one selected a group consisting of: video movie, digital camera, car navigation system, personal computer and projector. 35. A semiconductor device according to any one of claim 3, wherein said semiconductor device is one selected a group consisting of: video movie, digital camera, car navigation system, personal computer and projector. 36. A semiconductor device according to any one of claim 4, wherein said semiconductor device is one selected a group consisting of: video movie, digital camera, car navigation system, personal computer and projector. 37. A semiconductor device according to any one of claim 5, wherein said semiconductor device is one selected a group consisting of: video movie, digital camera, car navigation system, personal computer and projector. 38. A semiconductor device according to any one of claim 6, wherein said semiconductor device is one selected a group consisting of: video movie, digital camera, car navigation system, personal computer and projector. 39. A semiconductor device according to any one of claim 7, wherein said semiconductor device is one selected a group consisting of: video movie, digital camera, car navigation system, personal computer and projector. 40. A semiconductor device according to any one of claim 8, wherein said semiconductor device is one selected a group consisting of: video movie, digital camera, car navigation system, personal computer and projector. 41. A semiconductor device according to any one of claim 9, wherein said semiconductor device is one selected a group consisting of: video movie, digital camera, car navigation system, personal computer and projector. 42. A semiconductor device according to any one of claim 10, wherein said semiconductor device is one selected a group consisting of: video movie, digital camera, car navigation system, personal computer and projector.
Doklan Raymond H. (Whitehall Township ; Lehigh County PA) Martin ; Jr. Edward P. (Bethlehem PA) Roy Pradip K. (Allentown PA) Shive Scott F. (Bethlehem PA) Sinha Ashok K. (Allentown PA), Fabricating a semiconductor device with low defect density oxide.
Suzuki Masayoshi (Hitachiota JPX) Izaki Naoyuki (Hitachiota JPX), High voltage pulse generating semiconductor circuit with improved driving arrangement.
Gofuku Ihachiro (Hiratsuka JPX) Osada Yoshiyuki (Atsugi JPX) Nakagawa Katsumi (Kawasaki JPX), Method for driving a photo-sensor by applying a pulse voltage to an auxiliary electrode during a non-read time.
Tasch ; Jr. Aloysious F. (Richardson TX) Penz Perry A. (Richardson TX) Pankratz John M. (Plano TX) Lam Hon W. (Dallas TX), Method of fabricating display with semiconductor circuits on monolithic structure and flat panel display produced thereb.
Minoru Miyazaki JP; Akane Murakami JP; Baochun Cui JP; Mutsuo Yamamoto JP, Pixel thin film transistor and a driver circuit for driving the pixel thin film transistor.
Tigelaar Howard L. (Allen TX) Riemenschneider Bert R. (Plano TX) Chapman Richard A. (Dallas TX) Appel Andrew T. (Dallas TX), Process for thickening selective gate oxide regions.
Miyazaki Minoru (Kanagawa JPX) Murakami Akane (Kanagawa JPX) Cui Baochun (Kanagawa JPX) Yamamoto Mutsuo (Kanagawa JPX), Semiconductor device having a lead including aluminum.
Nelson Craig (Redwood City CA) Solis Javier (Santa Clara CA) Needle David L. (Alameda CA), System for dynamically providing predicted high/slow speed accessing memory to a processing unit based on instructions.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.