$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Semiconductor device having display device 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-029/72
  • H01L-029/66
출원번호 US-0254711 (2005-10-21)
등록번호 US-7414288 (2008-08-19)
우선권정보 JP-8-165272(1996-06-04)
발명자 / 주소
  • Ohtani,Hisashi
출원인 / 주소
  • Semiconductor Energy Laboratory Co., Ltd.
대리인 / 주소
    Fish & Richardson P.C.
인용정보 피인용 횟수 : 17  인용 특허 : 66

초록

A semiconductor integrated circuit having a high withstand voltage TFT and a TFT which is capable of operating at high speed in a circuit of thin film transistors (TFT) and methods for fabricating such circuit will be provided. A gate insulating film of the TFT required to operate at high speed (e.g

대표청구항

What is claimed is: 1. A semiconductor device comprising at least a display device, said display device comprising: a substrate having an insulating surface; a semiconductor layer over the substrate, said semiconductor layer including at least a channel region; a first insulating film comprising si

이 특허에 인용된 특허 (66)

  1. Yamazaki Shunpei,JPX ; Mase Akira,JPX ; Hiroki Masaaki,JPX ; Takemura Yasuhiko,JPX ; Zhang Hongyong,JPX ; Uochi Hideki,JPX, Active matrix display device.
  2. Shunpei Yamazaki JP; Akira Mase JP; Masaaki Hiroki JP; Yasuhiko Takemura JP; Hongyong Zhang JP; Hideki Uochi JP, Active matrix display device including a transistor.
  3. Yudasaka Ichio (Suwa JPX) Matsuo Minoru (Suwa JPX) Takenaka Satoshi (Suwa JPX), Active matrix panel and manufacturing method including TFTs having variable impurity concentration levels.
  4. Ohhashi Masayuki (Tokyo JPX), CMOS ESD protection structure.
  5. Tada Gen (Kawasaki JPX), CMOS structure with varying gate oxide thickness and with both different and like conductivity-type gate electrodes.
  6. Ohtani, Hisashi, Camera having display device utilizing TFT.
  7. Koyama Jun,JPX ; Takemura Yasuhiko,JPX, Complementary integrated circuit having N channel TFTs and P channel TFTs.
  8. Hotto Robert (3109 Evening Way La Jolla CA 92037), DC integrating display driver employing pixel status memories.
  9. Yamazaki Shunpei,JPX ; Zhang Hongyong,JPX, Display device with inverted type transistors in the peripheral and pixel portions.
  10. Page Rich ; Wiseman James ; Gibbons Jon, Display memory cache.
  11. Nakano Satoshi (Tokyo JPX), Display system of a camera selective display system for a camera.
  12. Miyazaki Minoru,JPX ; Murakami Akane,JPX ; Cui Baochun,JPX ; Yamamoto Mutsuo,JPX, Electronic circuit.
  13. Miyazaki Minoru,JPX ; Murakami Akane,JPX ; Cui Baochun,JPX ; Yamamoto Mutsuo,JPX, Electronic circuit.
  14. Miyazaki Minoru,JPX ; Murakami Akane,JPX ; Cui Baochun,JPX ; Yamamoto Mutsuo,JPX, Electronic circuit.
  15. Doklan Raymond H. (Whitehall Township ; Lehigh County PA) Martin ; Jr. Edward P. (Bethlehem PA) Roy Pradip K. (Allentown PA) Shive Scott F. (Bethlehem PA) Sinha Ashok K. (Allentown PA), Fabricating a semiconductor device with low defect density oxide.
  16. Shimizu Shinji (Houya JPX) Komori Kazuhiro (Kodaira JPX) Kosa Yasunobu (Kodaira JPX) Sugiura June (Musashino JPX), Forming memory transistors with varying gate oxide thicknesses.
  17. Suzuki Masayoshi (Hitachiota JPX) Izaki Naoyuki (Hitachiota JPX), High voltage pulse generating semiconductor circuit with improved driving arrangement.
  18. Fujihira Tatsuhiko (Nagano JPX) Nishiura Masaharu (Nagano JPX), High-withstand-voltage integrated circuit for driving a power semiconductor device.
  19. Yamazaki Shunpei,JPX ; Zhang Hongyong,JPX ; Takemura Yasuhiko,JPX, Insulated gate field effect transistor having specific dielectric structures.
  20. Gofuku Ihachiro (Hiratsuka JPX) Osada Yoshiyuki (Atsugi JPX) Nakagawa Katsumi (Kawasaki JPX), Method for driving a photo-sensor by applying a pulse voltage to an auxiliary electrode during a non-read time.
  21. Zhang Hongyong (Kanagawa JPX) Ohnuma Hideto (Kanagawa JPX) Yamaguchi Naoaki (Kanagawa JPX) Takemura Yasuhiko (Kanagawa JPX), Method for fabricating thin film transistor using anodic oxidation.
  22. Codama Mitsufumi (Kanagawa JPX), Method for forming a MOS transistor and structure thereof.
  23. Codama,Mitsufumi, Method for forming a MOS transistor having lightly dopped drain regions and structure thereof.
  24. Yamazaki Shunpei (Tokyo JPX) Mase Akira (Aichi JPX) Hiroki Masaaki (Kanagawa JPX) Takemura Yasuhiko (Kanagawa JPX) Zhang Hongyong (Kanagawa JPX) Uochi Hideki (Kanagawa JPX) Nemoto Hideki (Kanagawa JP, Method for forming a field-effect transistor including anodic oxidation of the gate.
  25. Yamazaki Shunpei,JPX ; Mase Akira,JPX ; Hiroki Masaaki,JPX ; Takemura Yasuhiko,JPX ; Zhang Hongyong,JPX ; Uochi Hideki,JPX, Method for forming a taper shaped contact hole by oxidizing a wiring.
  26. Chang Ko-Min (Austin TX) Shum Danny Pak-Chum (Austin TX) Chang Kuo-Tung (Austin TX), Method for making an EEPROM cell with isolation transistor.
  27. Takemura Yasuhiko,JPX ; Teramoto Satoshi,JPX, Method for manufacturing semiconductor device with removable spacers.
  28. Tasch ; Jr. Aloysious F. (Richardson TX) Penz Perry A. (Richardson TX) Pankratz John M. (Plano TX) Lam Hon W. (Dallas TX), Method of fabricating display with semiconductor circuits on monolithic structure and flat panel display produced thereb.
  29. Konuma Toshimitsu (Kanagawa JPX) Hiroki Masaaki (Kanagawa JPX) Zhang Hongyong (Kanagawa JPX) Yamamoto Mutsuo (Kanagawa JPX) Takemura Yasuhiko (Kanagawa JPX), Method of fabricating thin film semiconductor integrated circuit.
  30. Tada Gen (Kawasaki JPX), Method of producing a semiconductor device having two MIS transistor circuits.
  31. Wieder Armin (Gauting DEX) Risch Lothar (Ottobrunn DEX), Photo-transistor in MOS thin-film technology and method for production and operation thereof.
  32. Minoru Miyazaki JP; Akane Murakami JP; Baochun Cui JP; Mutsuo Yamamoto JP, Pixel thin film transistor and a driver circuit for driving the pixel thin film transistor.
  33. Masumo Kunio (Yokohama JPX) Yuki Masanori (Hadano JPX), Process for preparing a polycrystalline semiconductor thin film transistor.
  34. Tigelaar Howard L. (Allen TX) Riemenschneider Bert R. (Plano TX) Chapman Richard A. (Dallas TX) Appel Andrew T. (Dallas TX), Process for thickening selective gate oxide regions.
  35. Koyama Jun,JPX ; Takemura Yasuhiko,JPX ; Hayakawa Masahiko,JPX ; Yamazaki Shunpei,JPX ; Miyanaga Akiharu,JPX ; Ohtani Hisashi,JPX, Semiconductor active matrix circuit.
  36. Katoh Katsuto (Tokyo JPX) Naruke Kiyomi (Yokohama JPX), Semiconductor device.
  37. Takemura Yasuhiko,JPX ; Teramoto Satoshi,JPX, Semiconductor device and a manufacturing method for the same.
  38. Yasuhiko Takemura JP; Satoshi Teramoto JP, Semiconductor device and a manufacturing method for the same.
  39. Takemura, Yasuhiko; Teramoto, Satoshi, Semiconductor device and a method for manufacturing the same.
  40. Zhang Hongyong,JPX ; Ohnuma Hideto,JPX ; Yamaguchi Naoaki,JPX ; Takemura Yasuhiko,JPX, Semiconductor device and method for fabricating the same.
  41. Yamazaki Shunpei (Tokyo JPX) Mase Akira (Aichi JPX) Hiroki Masaaki (Kanagawa JPX) Takemura Yasuhiko (Kanagawa JPX) Zhang Hongyong (Kanagawa JPX) Uochi Hideki (Kanagawa JPX), Semiconductor device and method for forming the same.
  42. Yamazaki Shunpei (Tokyo JPX) Zhang Hongyong (Kanagawa JPX) Takamura Yasuhiko (Kanagawa JPX), Semiconductor device and method for forming the same.
  43. Yamazaki Shunpei,JPX ; Zhang Hongyong,JPX ; Takemura Yasuhiko,JPX, Semiconductor device and method for forming the same.
  44. Yamazaki, Shunpei; Zhang, Hongyong; Takemura, Yasuhiko, Semiconductor device and method for forming the same.
  45. Mitsufumi Codama JP; Kazushi Sugiura JP; Yukio Yamauchi JP; Naoya Sakamoto JP; Michio Arai JP, Semiconductor device and method for operating the same.
  46. Okamoto Yutaka (Tokyo JPX) Yamada Makoto (Kanagawa JPX) Shinguu Masataka (Tokyo JPX), Semiconductor device and method of manufacturing same.
  47. Nozaki Masahiko,JPX, Semiconductor device and production method therefor.
  48. Miyazaki Minoru (Kanagawa JPX) Murakami Akane (Kanagawa JPX) Cui Baochun (Kanagawa JPX) Yamamoto Mutsuo (Kanagawa JPX), Semiconductor device having a lead including aluminum.
  49. Jun Koyama JP; Yasuhiko Takemura JP, Semiconductor device having a pair of N-channel TFT and P-channel TFT.
  50. Yamazaki, Shunpei; Mase, Akira; Hiroki, Masaaki; Takemura, Yasuhiko; Zhang, Hongyong; Uochi, Hideki; Nemoto, Hideki, Semiconductor device having interlayer insulating film.
  51. Yamazaki Shunpei,JPX ; Mase Akira,JPX ; Hiroki Masaaki,JPX ; Takemura Yasuhiko,JPX ; Zhang Hongyong,JPX ; Uochi Hideki,JPX ; Nemoto Hideki,JPX, Semiconductor device having interlayer insulating film and method for forming the same.
  52. Suzawa Hideomi,JPX, Semiconductor device including active matrix circuit.
  53. Koyama Jun,JPX ; Kawasaki Yuji,JPX, Semiconductor integrated circuit.
  54. Koyama Jun,JPX ; Takemura Yasuhiko,JPX, Semiconductor integrated circuit.
  55. Koyama, Jun; Kawasaki, Yuji, Semiconductor integrated circuit.
  56. Ohtani Hisashi,JPX, Semiconductor integrated circuit and fabrication method thereof.
  57. Ohtani, Hisashi, Semiconductor integrated circuit and fabrication method thereof.
  58. Ohtani, Hisashi, Semiconductor integrated circuit and fabrication method thereof.
  59. Koyama Jun (Kanagawa JPX) Takemura Yasuhiko (Kanagawa JPX), Semiconductor integrated circuit having N-channel and P-channel transistors.
  60. Jun Koyama JP; Yuji Kawasaki JP, Semiconductor integrated system.
  61. Natsui Yoshinobu (Tokyo JPX), Semiconductor memory device.
  62. Nelson Craig (Redwood City CA) Solis Javier (Santa Clara CA) Needle David L. (Alameda CA), System for dynamically providing predicted high/slow speed accessing memory to a processing unit based on instructions.
  63. Konuma Toshimitsu (Kanagawa JPX) Hiroki Masaaki (Kanagawa JPX) Zhang Hongyong (Kanagawa JPX) Yamamoto Mutsuo (Kanagawa JPX) Takemura Yasuhiko (Kanagawa JPX), Thin film semiconductor integrated circuit and method of fabricating the same.
  64. Kodaira Toshimoto (Suwa JPX) Oshima Hiroyuki (Suwa JPX) Mano Toshihiko (Suwa JPX), Thin film transistor and display device including same.
  65. Matsumoto Hiroshi (Hachioji JPX), Thin film transistor device having driving circuit and matrix circuit.
  66. Miyazaki, Minoru; Murakami, Akane; Cui, Baochun; Yamamoto, Mutsuo, Thin film transistor having pixel electrode connected to a laminate structure.

이 특허를 인용한 특허 (17)

  1. Ono, Koji; Suzawa, Hideomi; Arao, Tatsuya, Electroluminescence display device.
  2. Ono, Koji; Suzawa, Hideomi; Arao, Tatsuya, Electroluminescence display device.
  3. Ono, Koji; Suzawa, Hideomi; Arao, Tatsuya, Electroluminescence display device.
  4. Ono, Koji; Suzawa, Hideomi; Arao, Tatsuya, Electroluminescence display device.
  5. Brederlow, Ralf; Hartwich, Jessica; Pacha, Christian; Rösner, Wolfgang; Schulz, Thomas, Integrated circuit arrangement with capacitor and fabrication method.
  6. Brederlow, Ralf; Hartwich, Jessica; Pacha, Christian; Rösner, Wolfgang; Schulz, Thomas, Integrated circuit arrangement with capacitor and fabrication method.
  7. Ono, Koji; Suzawa, Hideomi; Arao, Tatsuya, Semiconductor device.
  8. Yamazaki, Shunpei; Arai, Yasuyuki; Koyama, Jun, Semiconductor device and fabrication method thereof.
  9. Yamazaki, Shunpei; Arai, Yasuyuki; Koyama, Jun, Semiconductor device and fabrication method thereof.
  10. Yamazaki, Shunpei; Arai, Yasuyuki; Koyama, Jun, Semiconductor device and fabrication method thereof.
  11. Tokunaga, Hajime, Semiconductor device and manufacturing method thereof.
  12. Tokunaga, Hajime, Semiconductor device and manufacturing method thereof.
  13. Tokunaga, Hajime, Semiconductor device and manufacturing method thereof.
  14. Yamazaki, Shunpei; Arai, Yasuyuki; Koyama, Jun, Semiconductor device comprising a pixel unit including an auxiliary capacitor.
  15. Ohtani, Hisashi, Semiconductor device having display device.
  16. Ohtani, Hisashi, Semiconductor device having display device.
  17. Yamazaki, Shunpei; Koyama, Jun; Arai, Yasuyuki; Kuwabara, Hideaki, Semiconductor device having stick drivers and a method of manufacturing the same.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로