Thermal and power management for computer systems
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-001/32
G06F-001/08
출원번호
US-0524806
(2006-09-20)
등록번호
US-7418611
(2008-08-26)
발명자
/ 주소
Thomas,C. Douglass
Thomas,Alan E.
출원인 / 주소
Thomas,C. Douglass
Thomas,Alan E.
인용정보
피인용 횟수 :
3인용 특허 :
119
초록
Improved approaches to providing thermal and power management for a computing device are disclosed. These approaches facilitate intelligent control of a processor's clock frequency and/or a fan's speed so as to provide thermal and/or power management for the computing device.
대표청구항▼
What is claimed is: 1. A fan controller for a computer system, the computer system including at least a processor and at least one fan, said fan controller comprising: a data storage device configured to store a first threshold level and a second threshold level; a temperature input; a comparator t
What is claimed is: 1. A fan controller for a computer system, the computer system including at least a processor and at least one fan, said fan controller comprising: a data storage device configured to store a first threshold level and a second threshold level; a temperature input; a comparator that is configured to compare a temperature indication provided via the temperature input with at least one of the first threshold and the second threshold, and fan control circuitry that causes the fan to be off when the temperature indication is less than the first threshold, causes the fan to be on at a first speed when the temperature indication is greater than the first threshold and less than a second threshold, and causes the fan to be on at a second speed when the temperature indication is greater that the second threshold, the second speed being greater than the first speed, and the second threshold being greater than the first threshold. 2. A fan controller as recited in claim 1, wherein the speed of the fan is optimized in accordance with the temperature indication. 3. A fan controller as recited in claim 1, wherein the temperature indication pertains to the temperature of the processor. 4. A fan controller as recited in claim 1, wherein the fan is a multi-speed cooling fan for the processor. 5. A fan controller as recited in claim 1, wherein the temperature indication is provided by or derived from a temperature sensor thermally coupled to the processor to monitor the temperature of the processor. 6. A fan controller as recited in claim 5, wherein the temperature sensor is integrated with the processor, and wherein the processor is a microprocessor. 7. A fan controller as recited in claim 5, wherein said fan control circuitry provides fan control signals to control the speed of the fan. 8. A fan controller as recited in claim 7, wherein the fan control signals use pulse-width modulation (PWM) to control the speed of the fan. 9. A fan controller as recited in claim 8, wherein after being on at the second speed, said fan control circuitry further causes the fan to be on at the first speed if the temperature indication falls below a third threshold, the third threshold being greater than the first threshold and less than the second threshold. 10. A fan controller as recited in claim 9, wherein the temperature sensor is integrated with the processor. 11. A fan controller as recited in claim 1, wherein said fan control circuitry provides fan control signals to control the speed of the fan. 12. A fan controller as recited in claim 11, wherein the fan control signals use pulse-width modulation (PWM) to control the speed of the fan. 13. A fan controller as recited in claim 1, wherein said fan control circuitry further causes the fan to reduce from the second speed to the first speed if the temperature indication is below the second threshold by a predetermined amount. 14. A fan controller as recited in claim 1 wherein the computer system has at least first and second operational modes, and wherein at least one of the first threshold and the second threshold is dependent on the operational mode in which the computer system is operating. 15. An apparatus for thermally managing temperature of a microprocessor provided within a computer system, the microprocessor operates in accordance with a clock having a clock frequency, said apparatus comprising: an electrical connection to a temperature sensor provided within the microprocessor; a comparison unit for comparing a temperature indication from the temperature sensor via said connection with at least a first threshold amount to produce a first comparison result; and a thermal control unit for producing a first control signal for the microprocessor based on the first comparison result, wherein said thermal control unit updates the first control signal in accordance with changes to the first comparison result, wherein the first control signal serves to reduce the clock frequency of the clock when the temperature indication from the temperature sensor exceeds the first threshold amount, and wherein the first control signal serves to subsequently increase the clock frequency when the temperature indication from the temperature sensor is below a second threshold amount the second threshold amount pertaining to a temperature less than that pertaining to the first threshold amount. 16. An apparatus as recited in claim 15, wherein the first control signal is provided to the microprocessor and operates to cause reduction in the clock frequency of the clock. 17. An apparatus for thermally managing temperature of a microprocessor provided within a computer system, the microprocessor operates in accordance with a clock having a clock frequency, the computer system further including a fan, said apparatus comprising: an electrical connection to a temperature sensor provided within the microprocessor; a comparison unit for comparing a temperature indication from the temperature sensor via said connection with at least a first threshold amount to produce a first comparison result; and a thermal control unit for producing a first control signal for the microprocessor based on the first comparison result, wherein said thermal control unit updates the first control signal in accordance with changes to the first comparison result, wherein said comparison unit further compares the temperature indication from the temperature sensor with at least a second threshold amount to produce a second comparison result, the second threshold amount being different from the first threshold amount, and wherein said thermal control unit further produces a fan control signal for the fan based on the second comparison result. 18. An apparatus as recited in claim 17, wherein the first control signal serves to reduce the clock frequency of the clock when the temperature indication from the temperature sensor exceeds the first threshold amount. 19. An apparatus as recited in claim 18, wherein the first control signal serves to subsequently increase the clock frequency when the temperature indication from the temperature sensor is below a second threshold amount, the second threshold amount pertaining to a temperature less than that pertaining to the first threshold amount. 20. An apparatus as recited in claim 17, wherein the first control signal serves to reduce the clock frequency in a gradual, stepwise manner. 21. An apparatus as recited in claim 17, wherein the first control signal serves to reduce the clock frequency in a gradual, stepwise manner when the temperature indication from the temperature sensor exceeds the first threshold amount. 22. An apparatus as recited in claim 17, wherein the first comparison result is periodically updated. 23. An apparatus as recited in claim 17, wherein the fan control signal operates to control the speed of the fan, and wherein the fan control signal uses pulse-width modulation (PWM) to control the speed of the fan. 24. A fan controller for a computer system, the computer system including at least a processor and a multi-speed fan, the computer system having at least first and second operational modes, said fan controller comprising: a temperature input for receiving a temperature indication pertaining to the temperature of the processor; fan control circuitry that causes the speed of the fan to be controlled dependent upon the temperature indication; a digital storage device configured to store at least one digital threshold level; and a comparator that compares the temperature indication with the at least one digital threshold level, wherein the digital storage device stores a plurality of digital threshold levels, and wherein the digital threshold levels being utilized by said comparator depend on the operational mode in which the computer system is operating. 25. A fan controller as recited in claim 24, wherein the computer system further includes a temperature sensor thermally coupled to the processor to monitor the temperature of the processor, and wherein the temperature indication is provided by the temperature sensor. 26. A fan controller as recited in claim 25, wherein the temperature sensor is integrated with the processor. 27. A fan controller as recited in claim 24, wherein said fan control circuitry provides a fan control signal to control the speed of the fan. 28. A fan controller as recited in claim 27, wherein the fan control signal uses pulse-width modulation (PWM) to control the speed of the fan. 29. A fan controller as recited in claim 28, wherein the fan control signal is a pulse-width modulated version of a supply voltage. 30. A fan controller as recited in claim 24, wherein said fan control circuitry controls the speed of the fan to optimize the speed of the fan based on the temperature indication. 31. A fan controller as recited in claim 24, whereby said fan control circuitry controls the speed of the fan differently depending on the operational mode in which the computer system is operating.
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이 특허에 인용된 특허 (119)
Reinhardt Dennis ; Bhat Ketan ; Jackson Robert T. ; Senyk Borys ; Matter Eugene P. ; Gunther Stephen H., Apparatus and method for controlling power usage.
Carter Robert R. (Cypress TX) Garner Paul M. (The Woodlands TX) Cepulis Darren J. (Houston TX) Boone Carrie (Houston TX), Apparatus for reducing computer system power consumption.
Seibert Mark H. (Cupertino CA) Wallgren Markus C. (Palo Alto CA), Arrangement for reducing computer power consumption by turning off the microprocessor when inactive.
Katz Neil A. (Parkland FL) Pollitt Richard F. (Highland Beach FL) Suarez Leopoldo L. (Boca Raton FL) Frank C. William (Irvine CA), Battery operated computer operation suspension in response to environmental sensor inputs.
Canova ; Jr. Francis J. (Boynton Beach FL) Katz Neil A. (Parkland FL) Pollitt Richard F. (Jensen Beach FL) Suarez Leopoldo L. (Boca Raton FL) Astarabadi Shaun (Irvine CA) Frank C. William (Irvine CA), Battery operated computer power management system.
Bland Patrick M. (Delray Beach FL) Jackson Robert T. (Boyhton Beach FL) Joshi Jayesh (Santa Clara CA) Kardach James (San Jose CA), CPU clock control unit.
Atriss Ahmad H. (Chandler AZ) Peterson Benjamin C. (Tempe AZ) Parker Lanny L. (Mesa AZ), Circuit and method of sensing process and temperature variation in an integrated circuit.
Alexander Michael C. (Austin TX) Arizpe Arturo L. (Buda TX) Gerosa Gianfranco (Austin TX) Kahle James A. (Austin TX) Ogden Aubrey D. (Round Rock TX), Circuitry and method for reducing power consumption within an electronic circuit.
Hileman Vincent P. (San Jose CA) Lajara Robert J. (San Jose CA) Stewart Thomas E. J. (Sunnyvale CA) Mitty Nagaraj P. R. (San Jose CA) Tombari Joseph A. (Mountain View CA) Grouell William L. (San Ramo, Computer housing with low noise cooling system.
Harper Leroy D. (Sunnyvale CA) Schlichting Grayson C. (Cupertino CA) Hooks Douglas A. (Sunnyvale CA) Culimore Ian H. S. (Palo Alto CA) Bradshaw Gavin A. (Cupertino CA) Banerjee Biswa R. (San Jose CA), Computer power management system.
Dao Hung D. (Tomball TX) Grieff Thomas W. (Spring TX) Lattin ; Jr. Thomas W. (Houston TX) Thomas Darren R. (Spring TX) Schultz Stephen M. (Houston TX) Ewert Richard (Cypress TX) Flower David L. (Tomb, Disk drive unit overheating warning system.
Neal James R. (Cameron Park CA) Brown Peter F. (Orangevale CA) Agatstein Louis W. (El Dorado Hills CA) Gutman Michael (Zichron-Ya\cov ILX), Employing on die temperature sensors and fan-heatsink failure signals to control power dissipation.
Bertoluzzi Renitia J. (Saratoga CA) Jackson Robert T. (Boynton Beach FL) Weitzel Stephen D. (Boca Raton FL), Integrated dynamic power dissipation control system for very large scale integrated (VLSI) chips.
Vigil Daniel R. (Agoura Hills CA) Volz LeRoy A. (Northridge CA), Junction temperature status sensing and reduction for integrated power devices, such as a head positioning system in a m.
Kardach James P. (San Jose CA) Nakanishi Tosaku (Cupertino CA) Cheng Jimmy S. (Cupertino CA), Method and apparatus for asynchronously stopping the clock in a processor.
Matter Eugene P. (Folsom CA) Sotoudeh Yahya S. (Santa Clara CA) Mathews Gregory S. (Boca Raton FL), Method and apparatus for independently stopping and restarting functional units.
Hollowell ; II J. Rhoads (Sunnyvale CA) Beninghaus James R. (Cupertino CA) Hansen ; Jr. Daniel J. (Georgetown TX), Method and apparatus for thermal management in a computer system.
Turnbull Robert R. (Buchanan MI) DeLisle David J. (Berrien Springs MI) Kohtz Robert A. (St. Joseph MI), Method and control circuit for measuring the temperature of an integrated circuit.
Garcia-Duarte Fernando (Redmond WA) Hensley John (Redmond WA) Mohanraj Shanmugam (Redmond WA) Subramaniyan Nagarajan (Redmond WA) Olsson David B. (Seattle WA), Method and system for placing a computer in a reduced power state.
Rawson ; III Freeman L. (Boca Raton FL) Sotomayor ; Jr. Guy G. (West Palm Beach FL), Method and system of power and thermal management for a data processing system using object-oriented program design.
Nguyen Au H. (Santa Clara CA), Method for reducing power consumption includes comparing variance in number of time microprocessor tried to react input.
Nguyen Au H. (Santa Clara CA), Method for reducing power consumption includes comparing variance in number of times microprocessor tried to read input.
Kardach James P. (San Jose CA) Nakanishi Tosaku (Cupertino CA) Cheng Jimmy S. (Cupertino CA), Method of testing a microprocessor by masking of an internal clock signal.
Ristic Ljubisa (Phoenix AZ) Dunn William C. (Mesa AZ) Cambou Bertrand F. (Mesa AZ) Terry Lewis E. (Phoenix AZ) Roop Raymond M. (Scottsdale AZ), Microprocessor having environmental sensing capability.
Anderson Floyd E. (Phoenix AZ) Robb Stephen P. (Tempe AZ) Shaw Pern (Austin TX), Microprocessor having high current drive and feedback for temperature control.
Maher Robert (Carrollton TX) Garibay ; Jr. Raul A. (Plano TX) Herubin Margaret R. (Coppell TX) Bluhm Mark (Carrollton TX), Microprocessor having power management circuitry with coprocessor support.
Fujimori Atsushi (Tokyo JPX), Portable electronic device with selectable resume and suspend operations utilizing battery power control scheme with use.
Fung Henry T. S. (San Jose CA), Power conservation apparatus having multiple power reduction levels dependent upon the activity of the computer system.
O\Brien Rita M. (Austin TX) Wisor Michael T. (Austin TX), Power management control technique for timer tick activity within an interrupt driven computer system.
Smith R. Steven (Saratoga CA) Hanlon Mike S. (San Jose CA) Bailey Robert L. (San Jose CA), Power management for a laptop computer with slow and sleep modes.
Canova ; Jr. Francis J. (Boynton Beach FL) Parthasarathy Sivagnanam (Corona Del Mar CA), Power management initialization for a computer operable under a plurality of operating systems.
Stewart Gregory N. (Austin TX) Sato N. Albert (Austin TX) Startup Warren W. (Austin TX), Power management system with adaptive control parameters for portable computer.
Fairbanks John P. (Sunnyvale CA) Yuan Andy C. (Saratoga CA), Power supply and oscillator for a computer system providing automatic selection of supply voltage and frequency.
Juzswik David L. (Dearborn Heights MI) Webb Nathaniel (Detroit MI) Floyd William M. (Livonia MI), Power-conserving control system for turning-off the power and the clocking for data transactions upon certain system ina.
Yokouchi Hideaki (Nagano JPX) Kimura Takashi (Nagano JPX), Semiconductor device including clock selection circuitry selecting between high and low frequency clock signals for redu.
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