초록 ▼

A switch connection lock and release mechanism is disclosed to prevent out-of-order frames from being received by FC and/or SATA devices. The mechanism includes a set of previous AL_PA registers, alpa_reg[N:0], one for each port, and a bit vector, prev_conn[M:0], one bit for each Buffer Bank (BB).

A switch connection lock and release mechanism is disclosed to prevent out-of-order frames from being received by FC and/or SATA devices. The mechanism includes a set of previous AL_PA registers, alpa_reg[N:0], one for each port, and a bit vector, prev_conn[M:0], one bit for each Buffer Bank (BB). If a connection is closed prematurely, the valid AL_PA of the destination device and the source port number are stored in the previous AL_PA register associated with the destination port, and the bit in the bit vector associated with the source BB is asserted. Together, the valid AL_PA, the source port and the asserted bit form a connection lock on the destination port that effectively will deny access to the destination port to all BBs with the same destination AL_PA and source port number except the source BB.

대표청구항 ▼

What is claimed is: 1. In a system including a plurality of ports, the system for establishing a connection and enabling communications between a source and a destination device coupled to a destination port, a connection lock circuit for preventing Out-Of-Order (OOO) frames from being received by

What is claimed is: 1. In a system including a plurality of ports, the system for establishing a connection and enabling communications between a source and a destination device coupled to a destination port, a connection lock circuit for preventing Out-Of-Order (OOO) frames from being received by the destination device, the connection lock circuit comprising: a plurality of previous Arbitrated Loop Physical Address (AL_PA) registers, each previous AL_PA register associated with a different destination port for storing a valid AL_PA of a destination device coupled to that destination port when that destination port was participating in a connection; and control logic coupled to the previous AL_PA registers and configured for utilizing the previous AL_PA register associated with the destination port that was participating in the connection in determining whether a subsequent connection request received at the destination port should be blocked. 2. The connection lock circuit as recited in claim 1, further comprising: each previous AL_PA register for storing a source port number of a source port that was participating in the connection; and the control logic further configured for additionally utilizing the source port number stored in the previous AL_PA register associated with the destination port that was participating in the connection in determining whether a subsequent connection request received at the destination port should be blocked after the connection between the source and the destination device is prematurely closed. 3. The connection lock circuit as recited in claim 1, wherein when the destination device is a Serial Advanced Technology Attachment (SATA) device, the control logic is further configured for storing a unique fictitious AL_PA in the previous AL_PA register associated with the destination port to which the SATA device is connected. 4. A Fiber Channel Attached SATA Tunneling (FAST) switch comprising the connection lock circuit recited in claim 1. 5. The connection lock circuit as recited in claim 1, further comprising: a plurality of Fiber Channel Attached SATA Tunneling (FAST) engines coupled to the control logic; and a shared context engine coupled to the plurality of FAST engines and the control logic, the shared context engine including a plurality of Native Command Queues (NCQs), each NCQ associated with a particular source; wherein when the shared context engine is informed that the destination device is a SATA device that supports native command queuing and is available, the shared context engine stores a fast_blking_alpha as the valid AL_PA in the previous AL_PA register associated with the destination port to lock the connection. 6. The connection lock circuit as recited in claim 2, further comprising: a plurality of Buffer Banks (BBs) coupled to the control logic for assisting in enabling communications between the source and the destination device; a bit vector coupled to the control logic, each bit in the bit vector associated with a different BB for storing an indication of whether that BB was participating in the connection that was prematurely closed; and the control logic further configured for additionally utilizing the bit vector associated with the destination port that was participating in the connection in determining whether the subsequent connection request should be blocked after the connection between the source and the destination device is prematurely closed. 7. The connection lock circuit as recited in claim 2, the control logic further configured for detecting the premature closing of the connection by detecting a CLoSe (CLS) primitive sent from the destination device. 8. The connection lock circuit as recited in claim 3, the control logic further configured for blocking the connection request upon determining that a destination address of the connection request does not match the unique fictitious AL_PA associated with the destination port that was participating in the connection. 9. A Switched Bunch Of Disks (SBOD) comprising the FAST switch recited in claim 4. 10. The connection lock circuit as recited in claim 5, the control logic further configured for: determining whether the destination device is a SATA device that supports native command queuing, and if it is determined that the destination device is a SATA device that supports native command queuing, assigning an available FAST engine to the connection, and determining whether the destination port coupled to the destination device is available, and if it is available, informing the shared context engine that the destination device is a SATA device that supports native command queuing and is available. 11. A Fibre Channel Attached SATA Tunneling (FAST) switch comprising the connection lock circuit recited in claim 5. 12. The connection lock circuit as recited in claim 3, the control logic further configured for: blocking the connection request upon determining that a destination address and the source port of the connection request match the valid AL_PA and the source port number associated with the destination port that was participating in the connection, and the bit vector associated with the BB of the connection request is not set; and allowing all other connection requests. 13. The connection lock circuit as recited in claim 6, the control logic further configured for bypassing a normal priority scheme and immediately allowing the BB that participated in the connection to re-connect to the destination device. 14. The connection lock circuit as recited in claim 6, wherein each previous AL_PA register is initialized to store an invalid_alpha value and an invalid source port number, and each bit in the bit vector is initialized to store an unasserted value. 15. The connection lock circuit as recited in claim 10, wherein the control logic is further configured for storing commands from the source in the NCQ associated with the source after the connection has been locked. 16. A Switched Bunch Of Disks (SBOD) comprising the FAST switch recited in claim 11. 17. A Storage Area Network (SAN) comprising the SBOD recited in claim 9. 18. The connection lock circuit as recited in claim 15, wherein the assigned FAST engine fetches a next queued command from the NCQ associated with the source, and requests access to the destination device. 19. A Storage Area Network (SAN) comprising the SBOD recited in claim 16. 20. The connection lock circuit as recited in claim 18, wherein when the shared context engine determines that all commands have been sent to the destination device and all data from the destination device has been sent to the source, the shared context engine instructs the assigned FAST engine to close down the connection and store an invalid_alpha into the previous AL_PA register associated with the destination port. 21. In a system including a plurality of ports, the system for establishing a connection and enabling communications between a source and a destination device coupled to a destination port, a method for preventing Out-Of-Order (OOO) frames from being received by the destination device, the method comprising: storing a valid AL_PA of a destination device coupled to a destination port when that destination port was participating in the connection; and utilizing the stored valid AL_PA associated with the destination port that was participating in the connection in determining whether a subsequent connection request received at the destination port should be blocked. 22. The method as recited in claim 21, further comprising: storing a source port number of a source port that was participating in the connection; and additionally utilizing the stored source port number associated with the destination port that was participating in the connection in determining whether a subsequent connection request received at the destination port should be blocked after the connection between the source and the destination device is prematurely closed. 23. The method as recited in claim 21, further comprising: when the destination device is a Serial Advanced Technology Attachment (SATA) device, storing a unique fictitious AL_PA associated with the destination port to which the SATA device is connected. 24. The method as recited in claim 21, further comprising: upon determining that the destination device is a SATA device that supports native command queuing and is available; storing a fast_blking_alpha as the valid AL_PA associated with the destination port to lock the connection. 25. The method as recited in claim 22, further comprising: maintaining a plurality of Buffer Banks (BBs) for assisting in enabling communications between the source and the destination device; maintaining a bit vector, each bit in the bit vector associated with a different BB for storing an indication of whether that BB was participating in the connection that was prematurely closed; and additionally utilizing the bit vector associated with the destination port that was participating in the connection in determining whether the subsequent connection request should be blocked after the connection between the source and the destination device is prematurely closed. 26. The method as recited in claim 25, further comprising: blocking the connection request upon determining that a destination address and the source port of the connection request match the valid AL_PA and the source port number associated with the destination port that was participating in the connection, and the bit vector associated with the BB of the connection request is not set; and allowing all other connection requests. 27. The method as recited in claim 25, further comprising bypassing a normal priority scheme and immediately allowing the BB that participated in the connection to re-connect to the destination device. 28. The method as recited in claim 25, further comprising initially associating a invalid_alpha value and an invalid source port number with each destination port, and initializing each bit in the bit vector to an unasserted value. 29. The method as recited in claim 25, further comprising detecting the premature closing of the connection by detecting a CLoSe (CLS) primitive sent from the destination device. 30. The method as recited in claim 23, further comprising blocking the connection request upon determining that a destination address of the connection request does not match the unique fictitious AL_PA associated with the destination port that was participating in the connection. 31. The method as recited in claim 24, further comprising: determining whether the destination device is a SATA device that supports native command queuing, and if it is determined that the destination device is a SATA device that supports native command queuing, assigning an available Fibre Channel Attached SATA Tunneling (FAST) engine to the connection, and determining whether the destination port coupled to the destination device is available, and if it is available, informing the shared context engine that the destination device is a SATA device that supports native command queuing and is available. 32. The method as recited in claim 31, further comprising storing commands from the source in a Native Command Queue (NCQ) associated with the source after the connection has been locked. 33. The method as recited in claim 32, further comprising using the assigned FAST engine to fetch a next queued command from the NCQ associated with the source and request access to the destination device. 34. The method as recited in claim 33, further comprising when the shared context engine determines that all commands have been sent to the destination device and all data from the destination device has been sent to the source, the shared context engine instructs the assigned FAST engine to close down the connection and store an invalid_alpha into the previous AL_PA register associated with the destination port.