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Method for maximizing server utilization in a resource constrained environment 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-001/26
출원번호 US-0209870 (2005-08-23)
등록번호 US-7461274 (2008-12-02)
발명자 / 주소
  • Merkin,Aaron E.
출원인 / 주소
  • International Business Machines Corporation
대리인 / 주소
    Byrd,Cynthia S.
인용정보 피인용 횟수 : 64  인용 특허 : 7

초록

A mechanism for controlling the hardware resources on a blade server, and thereby limiting the power consumption of the blade server is disclosed. The enforceable hardware resources that are controlled include the base frequency of the central processing unit (CPU) as well as power to individual ban

대표청구항

What is claimed is: 1. A method for allocating electrical power to a plurality of blade servers installed in a blade center chassis, further including a management module in said blade center chassis, said method comprising the steps of: reading a total power capacity of said blade center chassis b

이 특허에 인용된 특허 (7)

  1. Lee,Chun Liang, Blade server performance management method and system.
  2. Fee Brendan (Nashua NH) Dobbins Kurt (Bedford NH) Arneson Dave (Bow NH) Mullaney Pat (Nashua NH), Distributed chassis agent for distributed network management.
  3. Lee,Chun Liang, Method of managing power of control box.
  4. Rao, Ramakrishna; Schunk, Richard; Ghahremani, Charlie, Multi-service network switch with multiple virtual routers.
  5. Zimmer,Vincent J.; Rothman,Michael A., Power management for clustered computing platforms.
  6. Lumelsky, Leon L.; Manohar, Nelson R.; Wood, Stephen P., Self-regulated resource management of distributed computer resources.
  7. Larson, Thane M.; Bresniker, Kirk, System and method for power management in a server system.

이 특허를 인용한 특허 (64)

  1. Fan, Xiaobo; Hennecke, Mark D.; Heath, Taliver Brooks, Accurate power allotment.
  2. Mar, Monte, Apparatus and method for programmable power management in a programmable analog circuit block.
  3. Hernandez, Henrich; Patwardhan, Shriram, Apparatus and method for remote power control.
  4. Patel, Alpesh S.; O'Rourke, Chris; Albert, Mark; Mackie, Robert A.; Dixon, Walter G., Balancing server load according to availability of physical resources based on the detection of out-of-sequence packets.
  5. Roe, Steve; Nemecek, Craig, Breakpoint control in an in-circuit emulation system.
  6. Wright, David G.; Williams, Timothy J., Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes.
  7. Holle, Matthew H.; Berard, Stephen R.; McGrane, Sean N.; Parchem, John M., Collaborative power sharing between computing devices.
  8. Weber, Wolf-Dietrich; Fan, Xiaobo; Barroso, Luiz Andre, Computer and data center load determination.
  9. Weber, Wolf-Dietrich; Fan, Xiaobo; Barroso, Luiz Andre, Computer and data center load determination.
  10. Weber, Wolf-Dietrich; Fan, Xiaobo; Barroso, Luiz Andre, Computer and data center load determination.
  11. Best, Andrew; Ogami, Kenneth; Zhaksilikov, Marat, Configuration of programmable IC design elements.
  12. Best, Andrew; Ogami, Kenneth; Zhaksilikov, Marat, Configuration of programmable IC design elements.
  13. Weber, Wolf-Dietrich; Fan, Xiaobo; Barroso, Luiz Andre, Data center load monitoring for utilizing an access power amount based on a projected peak power usage and a monitored power usage.
  14. Akers, Jason B.; Clay, Ross B.; Jones, Perry L.; Holt, Ryan A., Data center power adjustment.
  15. Loboz, Charles Z.; Lee, Steve; Harpel, Thomas R., Determining server utilization.
  16. Loboz, Charles Z.; Lee, Steve; Harpel, Thomas R., Determining server utilization.
  17. Sakthikumar, Palsamy; Zimmer, Vincent J., Enabling a heterogeneous blade environment.
  18. Sakthikumar, Palsamy; Zimmer, Vincent J., Enabling a heterogeneous blade environment.
  19. Nemecek, Craig; Roe, Steve, External interface for event architecture.
  20. Vasan, Arunchandar; Sivasubramaniam, Anand; Jayaprakash, Rajesh; Rajaram, Perumal; Subbiah, Rajesh; Orvakanti, Praveen; Thirunavukkarasu, Sivabalan, Generation of energy consumption profiles.
  21. Anderson, Doug, Graphical user interface with user-selectable list-box.
  22. Leopardi, Emmett Jay; Thurmond, III, Walter Riley; Harte, Carl R., Horizontally expandable computing system.
  23. Nemecek, Craig; Roe, Steve, In-circuit emulator and pod synchronized boot.
  24. Seguine, Dennis R., Input/output multiplexer bus.
  25. Sequine, Dennis R., Input/output multiplexer bus.
  26. Weber, Wolf-Dietrich; Fan, Xiaobo; Barroso, Luiz Andre, Load control in a data center.
  27. Weber, Wolf-Dietrich; Fan, Xiaobo; Barroso, Luiz Andre, Load control in a data center.
  28. Goodrum, Alan L.; Tipley, Roger E.; Basile, Barry S., Maintaining a power budget.
  29. Fan, Xiaobo; Hennecke, Mark D.; Heath, Taliver Brooks, Method of correlating power in a data center by fitting a function to a plurality of pairs of actual power draw values and estimated power draw values determined from monitored CPU utilization of a statistical sample of computers in the data center.
  30. Bajpay, Paritosh; Best, Robert; Bond, Romelle; Eslambolchi, Hossein; Glozzy, Richard; Hughes, Alan; McCanuel, John, Methods for identifying and recovering non-revenue generating network circuits established outside of the United States.
  31. Bajpay, Paritosh; Best, Robert; Bond, Romelle; Eslambolchi, Hossein; Glozzy, Richard; Hughes, Alan; McCanuel, John, Methods for identifying and recovering non-revenue generating network circuits established outside of the united states.
  32. Bajpay, Paritosh; Best, Robert; Eslambolchi, Hossein; Glozzy, Richard; Hughes, Alan; McCanuel, John, Methods for identifying and recovering stranded and access-no-revenue network circuits.
  33. Snyder, Warren S.; Mar, Monte, Microcontroller programmable system on a chip.
  34. Snyder, Warren S.; Mar, Monte, Microcontroller programmable system on a chip.
  35. Snyder, Warren S.; Mar, Monte, Microcontroller programmable system on a chip.
  36. Snyder, Warren, Microcontroller programmable system on a chip with programmable interconnect.
  37. Snyder, Warren S, Microcontroller programmable system on a chip with programmable interconnect.
  38. Kutz, Harold, Numerical band gap.
  39. Snyder, Warren S.; Mar, Monte, PSOC architecture.
  40. Snyder, Warren; Mar, Monte, PSOC architecture.
  41. Snyder, Warren S.; Mar, Monte, PSoC architecture.
  42. Snyder, Warren S.; Mar, Monte, PSoC architecture.
  43. Ogami, Kenneth Y., Power management architecture, method and configuration system.
  44. Ogami, Kenneth Y., Power management architecture, method and configuration system.
  45. Brundridge, Michael A.; Brumley, Alan, Power profiling application for managing power allocation in an information handling system.
  46. Brundridge, Michael A.; Brumley, Alan, Power profiling application for managing power allocation in an information handling system.
  47. Weber, Wolf-Dietrich; Fan, Xiaobo; Barroso, Luiz Andre, Powering a data center.
  48. Snyder, Warren, Programmable microcontroller architecture.
  49. Snyder, Warren; Mar, Monte, Programmable microcontroller architecture(mixed analog/digital).
  50. Thiagarajan, Eashwar; Sivadasan, Mohandas Palatholmana; Rohilla, Gajender; Kutz, Harold; Mar, Monte, Programmable sigma-delta analog-to-digital converter.
  51. Pleis, Matthew A.; Sullam, Bert; Lesher, Todd, Reconfigurable testing system and method.
  52. Ahuja, Manish; Schopp, Joel H.; Strosaker, Michael T., Resource sharing expansion card.
  53. Ahuja, Manish; Schopp, Joel H.; Strosaker, Michael T., Resource sharing expansion card.
  54. Akers, Jason B.; Clay, Ross B.; Hollinger, Michael C.; Holt, Ryan A.; Jones, Perry L., Server allocation to workload based on energy profiles.
  55. Malone, Christopher G.; Vaden, Thomas L; Goldstein, Martin; Huscroft, Carey, Server configured for managing power and performance.
  56. Talkin, David; Brooks, Alec, Supplying grid ancillary services using controllable loads.
  57. Ogami, Kenneth; Best, Andrew; Zhaksilikov, Marat, System and method for controlling a target device.
  58. Sullam, Bert; Snyder, Warren; Mohammed, Haneef, System level interconnect with programmable switching.
  59. Sullam, Bert; Snyder, Warren; Mohammed, Haneef, System level interconnect with programmable switching.
  60. Ogami, Kenneth Y.; Anderson, Doug; Pleis, Matthew; Hood, Rick, Techniques for generating microcontroller configuration information.
  61. Venkataraman, Garthik; Kutz, Harold; Mar, Monte, Temperature sensor with digital bandgap.
  62. Meier, Stephan; Evers, Marius, Token based power control mechanism.
  63. Bartz, Manfred; Zhaksilikov, Marat; Anderson, Doug, User interface for efficiently browsing an electronic document using data-driven tabs.
  64. Sivadasan, Mohandas Palatholmana; Rohilla, Gajendar, Voltage controlled oscillator delay cell and method.
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