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Semiconductor device having dielectric film having aperture portion 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/48
  • H01L-029/40
  • G02F-001/13
  • G02F-001/1362
  • H01L-021/336
  • H01L-021/02
출원번호 US-0273134 (2002-10-17)
등록번호 US-7474002 (2009-01-06)
우선권정보 JP-2001-332052(2001-10-30)
발명자 / 주소
  • Ishikawa,Akira
출원인 / 주소
  • Semiconductor Energy Laboratory Co., Ltd.
대리인 / 주소
    Cook Alex Ltd.
인용정보 피인용 횟수 : 1  인용 특허 : 32

초록

In the semiconductor device having a structure in which a plurality of layers are built-up by layers made of different materials or layers including various formed patterns, it is an object to provide a method which smoothing surface can be achieved without a polishing treatment by CMP method or a s

대표청구항

What is claimed is: 1. A semiconductor device comprising: a first dielectric film having an aperture portion, a semiconductor layer formed in the aperture portion, and a second dielectric film over the first dielectric film and the semiconductor layer, wherein the second dielectric film contacts an

이 특허에 인용된 특허 (32)

  1. Ishikawa, Akira, Active matrix display device.
  2. Kouchi Tetsunobu,JPX, Active matrix type liquid crystal display apparatus with conductive light shield element.
  3. Beasom James D. (Melbourne Village FL), Dense, reduced leakage CMOS structure.
  4. Murade, Masao, Electric-optic device, method of fabricating the same, and electronic apparatus.
  5. Hirabayashi Yukiya,JPX ; Katayama Shigenori,JPX ; Yasukawa Masahiro,JPX, Electro-optical device in which an extending portion of a channel region of a semiconductor layer is connected to a capacitor line and an electronic apparatus including the electro-optical device.
  6. Birecki, Henryk; Binh, Vu Thien; Lam, Si-ty; Kuo, Huei Pei; Naberhuis, Steven L., Electron emitter device for data storage applications.
  7. Yamazaki Shunpei,JPX ; Teramoto Satoshi,JPX, Hybrid circuit and electronic device using same.
  8. Murade Masao,JPX, Light shielding structure of a substrate for a liquid crystal device, liquid crystal device and projection type display device.
  9. Jae-Deok Park KR; Ju-Cheon Yeo KR, Liquid crystal display device and method of manufacturing the same.
  10. Matsushima Yasuhiro,JPX, Liquid crystal display device having an insulation film made of organic material between an additional capacity and a bu.
  11. Hseuh Fu-Lung (Middlesex NJ) Ipri Alfred C. (Princeton NJ) Dolny Gary M. (Newtown PA) Stewart Roger G. (Hillsborough Township ; Somerset County NJ), Method for fabricating a switching transistor having a capacitive network proximate a drift region.
  12. Rajagopalan, Nagarajan; Feng, Joe; Ngai, Christopher S; Shek, Meiyee (Maggie Le); Parikh, Suketu A; Thanh, Linh H, Method for forming silicon containing layers on a substrate.
  13. Nagakubo Yoshihide (Kawasaki JPX) Momose Hiroshi (Yokohama JPX), Method for manufacturing semiconductor device.
  14. Ohtani, Hisashi; Takemura, Yasuhiko; Miyanaga, Akiharu; Yamazaki, Shunpei, Method for producing semiconductor device.
  15. Ohtani Hisashi,JPX ; Takemura Yasuhiko,JPX ; Miyanaga Akiharu,JPX ; Yamazaki Shunpei,JPX, Method of crystallizing a silicon film.
  16. Poleshuk Michael (Webster NY) Wysocki Joseph J. (Webster NY), Method of making planar thin film transistors, transistor arrays.
  17. Ritsuko Kawasaki JP; Kenji Kasahara JP; Hisashi Ohtani JP, Method of manufacturing a semiconductor device with TFT.
  18. Takebuchi Masataka (Yokohama JPX), Nonvolatile semiconductor memory device with isolated gate electrodes.
  19. Frijlink Peter,FRX ; Oszustowicz Jean-Luc,FRX, Process of manufacturing a semiconductor device including a buried channel field effect transistor.
  20. Chen, Robert C; Shields, Jeffrey A.; Dawson, Robert; Tran, Khanh, Punch-through via with conformal barrier liner.
  21. Yamazaki Shunpei (Tokyo JPX) Mase Akira (Kanagawa JPX), Semiconductor device.
  22. Ohtani Hisashi,JPX ; Takemura Yasuhiko,JPX ; Miyanaga Akiharu,JPX ; Yamazaki Shunpei,JPX, Semiconductor device and method for producing the same.
  23. Hiratani, Masahiko; Kimura, Shinichiro; Hamada, Tomoyuki, Semiconductor device and method of manufacturing thereof.
  24. Takemura Yasuhiko (Kanagawa JPX) Adachi Hiroki (Kanagawa JPX), Semiconductor device and process for fabricating the same.
  25. Uochi Hideki,JPX, Semiconductor device and process for fabricating the same.
  26. Misu Kazuhiro (Tokyo JPX), Semiconductor device having protective element.
  27. Tsugane, Hiroaki; Sato, Hisakatsu, Semiconductor devices and methods for manufacturing the same.
  28. Kondo Hideyuki (Tokyo JPX), Semiconductor integrated circuit device provided with a capacitor element having an oxidation-resist film as a dielectri.
  29. Jang, Syun-Ming; Chen, Ying-Ho, Shallow trench isolation planarized by wet etchback and chemical mechanical polishing.
  30. Moslehi Mehrdad M., Ultra high-speed chip semiconductor integrated circuit interconnect structure and fabrication method using free-space dielectrics.
  31. Chang Won Kim KR; Chang Yeon Kim KR; Young Sik Jeong KR; Jung Kee Yoon KR; Jae Beom Choi KR, X-ray image sensor and method for fabricating the same.
  32. Kyo-Seop Choo KR; June-Ho Park KR, X-ray image sensor and method for fabricating the same.

이 특허를 인용한 특허 (1)

  1. Shizukuishi, Makoto, MOS type solid-state image pickup apparatus with wiring layers of different line-width and thickness.
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