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Atomic layer deposited lanthanum-metal oxide dielectric layers and methods of fabricating such dielectric layers provide an insulating layer in a variety of structures for use in a wide range of electronic devices. In an embodiment, a lanthanum aluminum oxide dielectric layer is formed by depositing

Atomic layer deposited lanthanum-metal oxide dielectric layers and methods of fabricating such dielectric layers provide an insulating layer in a variety of structures for use in a wide range of electronic devices. In an embodiment, a lanthanum aluminum oxide dielectric layer is formed by depositing aluminum and lanthanum by atomic layer deposition onto a substrate surface in which precursors to deposit the lanthanum include a trisethylcyclopentadionatolanthanum precursor and/or a trisdipyvaloylmethanatolanthanum precursor.

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What is claimed is: 1. A method comprising: forming a dielectric layer containing a lanthanum-metal oxide layer in an integrated circuit, the lanthanum-metal oxide layer formed by a self-limiting monolayer or partial monolayer sequencing process including: pulsing at least one of a trisethylcyclope

What is claimed is: 1. A method comprising: forming a dielectric layer containing a lanthanum-metal oxide layer in an integrated circuit, the lanthanum-metal oxide layer formed by a self-limiting monolayer or partial monolayer sequencing process including: pulsing at least one of a trisethylcyclopentadionatolanthanum precursor or a trisdipyvaloylmethanatolanthanum precursor; and pulsing a metal containing precursor, wherein the metal is a metal other than lanthanum. 2. The method of claim 1, wherein the method is a method of forming a transistor. 3. The method of claim 1, wherein the method is a method of forming a capacitor. 4. The method of claim 1, wherein the method is a method of forming a memory device. 5. The method of claim 1, wherein the method is a method of forming an electronic system. 6. A method comprising: forming a dielectric layer containing a lanthanum-metal oxide layer in an integrated circuit, the lanthanum-metal oxide layer formed by atomic layer deposition including: pulsing at least one of a trisethylcyclopentadionatolanthanum precursor or a trisdipyvaloylmethanatolanthanum precursor; and pulsing a metal containing precursor, wherein the metal is a metal other than lanthanum, wherein pulsing a metal containing precursor includes pulsing an aluminum containing precursor. 7. The method of claim 6 , wherein forming a dielectric layer containing a lanthanum-metal oxide layer includes forming a lanthanum aluminum oxide as a compound of lanthanum oxide and aluminum oxide. 8. The method of claim 6, wherein forming a dielectric layer containing a lanthanum-metal oxide layer includes forming a lanthanum aluminum oxide as LaAlO3. 9. A method comprising: forming a dielectric layer containing a lanthanum aluminum oxide layer in an integrated circuit, the lanthanum aluminum oxide layer formed by atomic layer deposition including: pulsing a trisethylcyclopentadionatolanthanum precursor; and pulsing an aluminum containing precursor. 10. The method of claim 9, wherein forming a dielectric layer containing a lanthanum aluminum oxide layer includes forming the dielectric layer substantially as LaAlO3. 11. The method of claim 9, wherein pulsing an aluminum containing precursor includes pulsing a trimethylaluminum precursor. 12. The method of claim 9, wherein the method is a method of forming an integrated circuit and forming the dielectric layer includes forming the dielectric layer as a gate insulator of a transistor in the integrated circuit. 13. The method of claim 9, wherein the method is a method of forming an integrated circuit and forming the dielectric layer includes forming the dielectric layer as a gate insulator in a CMOS transistor in the integrated circuit. 14. The method of claim 9, wherein the method is a method of forming an integrated circuit including forming the dielectric layer as a dielectric of a capacitor in the integrated circuit. 15. The method of claim 9, wherein forming the dielectric layer includes forming the dielectric layer as a nanolaminate having the lanthanum aluminum oxide layer and including a lanthanide oxide layer. 16. The method of claim 9, wherein forming the dielectric layer includes forming the dielectric layer as a nanolaminate having the lanthanum aluminum oxide layer and including an aluminum oxide layer. 17. The method of claim 9, wherein forming the dielectric layer includes forming the dielectric layer as a nanolaminate having the lanthanum aluminum oxide layer and including an aluminum oxide layer and a lanthanide oxide layer. 18. A method comprising: forming a memory array in a substrate including forming a dielectric layer containing a lanthanum aluminum oxide layer in an integrated circuit, the lanthanum aluminum oxide layer formed by atomic layer deposition including: pulsing a trisethylcyclopentadionatolanthanum precursor; and pulsing an aluminum containing precursor; and forming an address decoder in the substrate coupled to the memory array. 19. The method of claim 18, wherein pulsing an aluminum containing precursor includes pulsing an adduct of alane and dimethylethylamine as a precursor. 20. The method of claim 18, wherein the method is a method of forming a memory device and forming the dielectric layer includes forming the dielectric layer as a gate insulator of a transistor in the memory device. 21. The method of claim 18, wherein the method is a method of forming a flash memory device and forming the dielectric layer includes forming the dielectric layer as an intergate insulator of a floating gate transistor in the flash memory device. 22. The method of claim 18, wherein the method is a method of forming a memory device including forming the dielectric layer as a dielectric of a capacitor in the memory device. 23. The method of claim 22, wherein the method is a method of forming a dynamic random access memory. 24. A method comprising: forming a dielectric layer containing a lanthanum aluminum oxide layer in an integrated circuit, the lanthanum aluminum oxide layer formed by atomic layer deposition including: pulsing a trisdipyvaloylmethanatolanthanum precursor; and pulsing an aluminum containing precursor. 25. The method of claim 24, wherein forming a dielectric layer containing a lanthanum aluminum oxide layer includes forming the lanthanum aluminum oxide as a compound of lanthanum oxide and aluminum oxide. 26. The method of claim 24, wherein pulsing an aluminum containing precursor includes pulsing an adduct of alane and dimethylethylamine as a precursor. 27. The method of claim 24, wherein the method is a method of forming an integrated circuit and forming the dielectric layer includes forming the dielectric layer as a gate insulator of a transistor in the integrated circuit. 28. The method of claim 24, wherein the method is a method of forming an integrated circuit and forming the dielectric layer includes forming the dielectric layer as a gate insulator in a CMOS transistor in the integrated circuit. 29. The method of claim 24, wherein the method is a method of forming an integrated circuit and forming the dielectric film includes forming the dielectric layer as a dielectric in a capacitor in the integrated circuit. 30. The method of claim 24, wherein forming the dielectric layer includes forming the dielectric layer as a nanolaminate having the lanthanum aluminum oxide layer and including a lanthanide oxide layer. 31. The method of claim 24, wherein forming the dielectric layer includes forming the dielectric layer as a nanolaminate having the lanthanum aluminum oxide layer and including an aluminum oxide layer. 32. The method of claim 24, wherein forming the dielectric layer includes forming the dielectric layer as a nanolaminate having the lanthanum aluminum oxide layer and including an aluminum oxide layer and a lanthanide oxide layer. 33. A method comprising: forming a memory array in a substrate including: forming a dielectric layer containing a lanthanum aluminum oxide layer in an integrated circuit, the lanthanum aluminum oxide layer formed by atomic layer deposition including: pulsing a trisdipyvaloylmethanatolanthanum precursor; and pulsing an aluminum containing precursor; and forming an address decoder in the substrate, the address decoder coupled to the memory array. 34. The method of claim 33, wherein pulsing an aluminum containing precursor includes pulsing a trimethylaluminum precursor. 35. The method of claim 33, wherein the method is a method of forming a dynamic random access memory and forming the dielectric layer includes forming the dielectric layer as a gate insulator of a transistor in the dynamic random access memory. 36. The method of claim 33, wherein the method is a method of forming a flash memory device and forming the dielectric layer includes forming the dielectric layer as an inter-gate insulator of a floating gate transistor in the flash memory device. 37. The method of claim 33, wherein the method is a method of forming a memory device including forming the dielectric layer as a dielectric of the capacitor in the memory device. 38. The method of claim 33, wherein the method is a method of forming a dynamic random access memory.