IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
UP-0851685
(2004-05-21)
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등록번호 |
US-7535315
(2009-07-01)
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발명자
/ 주소 |
- Yarbrough, III, Charles T.
- Reimund, James A.
- Sukumaran, Rajesh
- Haddad, Michel G.
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출원인 / 주소 |
- National Instruments Corporation
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대리인 / 주소 |
Meyertons Hood Kivlin Kowert & Goetzel, P.C.
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인용정보 |
피인용 횟수 :
0 인용 특허 :
6 |
초록
▼
A dimensionally flexible sparse matrix comprising multiple ports connected to a plurality of interconnected universal switches is disclosed. Each universal switch has at least three terminals and is switchable to connect any pair or all three terminals together. The plurality of interconnected unive
A dimensionally flexible sparse matrix comprising multiple ports connected to a plurality of interconnected universal switches is disclosed. Each universal switch has at least three terminals and is switchable to connect any pair or all three terminals together. The plurality of interconnected universal switches are independently switchable to connect any one or more ports of the sparse matrix to any subset of the other ports. The sparse matrix may also be configurable to duplicate the connectivity of a variety of dimensionally different switch matrices by designating a first subset of the multiple ports as row ports and a second subset of the remaining ports as column ports with the added flexibility of connecting row-to-row and/or column-to column. The small physical size of signal stubs in the universal switches results in a signal path between any pair of terminals that may be suitable for the transmission of signal frequencies greater than approximately 500 mega-hertz.
대표청구항
▼
What is claimed is: 1. A sparse switch matrix, comprising: a plurality of ports; and a plurality of interconnected universal switches coupled to the plurality of ports, wherein each universal switch is independently switchable, and wherein the plurality of interconnected universal switches are conf
What is claimed is: 1. A sparse switch matrix, comprising: a plurality of ports; and a plurality of interconnected universal switches coupled to the plurality of ports, wherein each universal switch is independently switchable, and wherein the plurality of interconnected universal switches are configurable to implement connections between any first subset of ports of the plurality of ports and any second subset of the remaining ports of the plurality of ports, without requiring connections to any ports of the finally remaining ports of the plurality of ports. 2. The sparse switch matrix of claim 1, wherein one or more of the plurality of ports are common ports. 3. The sparse switch matrix of claim 2, wherein each signal path from a respective one of the common ports to each port of a selected subset of the plurality of ports has approximately equivalent electrical length and impedance. 4. The sparse switch matrix of claim 1, wherein the plurality of interconnected universal switches are switchable to implement a plurality of dimensionally different switch matrices, wherein a first subset of the plurality of ports is specified as row ports and a second subset of the remaining ports of the plurality of ports is specified as column ports. 5. The sparse switch matrix of claim 4, wherein the plurality of interconnected universal switches are switchable to connect ports row-to-row without connecting to a column, column-to-column without connecting to a row, or both row-to-row and column-to-column. 6. The sparse switch matrix of claim 1, wherein each universal switch comprises: a first terminal, a second terminal, and a third terminal; and a plurality of interconnected switches, coupled to the terminals, wherein each switch is independently switchable; wherein the plurality of interconnected switches are configurable to implement: the first terminal connected only to the second terminal; the first terminal connected only to the third terminal; the second terminal connected only to the third terminal; or the first terminal connected to the second terminal and the third terminal. 7. The sparse switch matrix of claim 1, wherein the plurality of interconnected universal switches are independently switchable to provide a radio frequency signal route from any port of the plurality of ports to any other port of the plurality of ports. 8. The sparse switch matrix of claim 7, wherein each of the plurality of interconnected universal switches comprises two interconnected single pole double throw switches. 9. The sparse switch matrix of claim 8, wherein a radio frequency signal has on the radio frequency signal route a frequency greater than approximately 500 mega-hertz. 10. The sparse switch matrix of claim 1, further comprising one or more disconnect switches, wherein each disconnect switch is connected between a port and a terminal of a respective universal switch. 11. The sparse switch matrix of claim 10, further comprising a controller operable to set an internal connection state of each universal switch and each disconnect switch such that the first and second subsets of the plurality of ports are connected, wherein the controller is coupled to the plurality of interconnected universal switches and the disconnect switches. 12. The sparse switch matrix of claim 1, wherein the plurality of universal switches are independently switchable to subdivide the sparse matrix into independent portions of the sparse matrix. 13. The sparse switch matrix of claim 12, wherein each independent portion of the sparse matrix is operable to carry an independent signal. 14. The sparse switch matrix of claim 1, wherein at least a subset of the plurality of ports are terminated. 15. The sparse switch matrix of claim 1, wherein each universal switch comprises: N terminals, wherein N is an integer greater than 2; and a plurality of interconnected switches, coupled to the N terminals, wherein each switch is independently switchable; wherein the plurality of interconnected switches are switchable to: connect any two of the N terminals to each other; connect any three of the N terminals to each other; connect all N terminals to each other; connect any first subset of the N terminals to any second subset of the N terminals; and disconnect all N terminals from each other. 16. A sparse switch matrix, comprising: a first sparse matrix module, wherein the module comprises: a first universal switch, a second universal switch, and a third universal switch, wherein each universal switch has a first terminal, a second terminal, and a third terminal, and wherein the third terminal of the first universal switch is connected to the first terminal of the third universal switch and the third terminal of the second universal switch is connected to the second terminal of the third universal switch; a first port connected to the first terminal of the first universal switch; a second port connected to the second terminal of the first universal switch; a third port connected to the first terminal of the second universal switch; and a fourth port connected to the second terminal of the second universal switch; and a first common port connected to the third terminal of the third universal switch; wherein the first, second, and third universal switches are switchable to provide a signal path from any first subset of the ports to any second subset of the ports. 17. The sparse switch matrix of claim 16, further comprising one or more disconnect switches, wherein each disconnect switch is connected between a port and a corresponding terminal of a universal switch. 18. The sparse switch matrix of claim 16, wherein each signal path from the first common port to any other port has approximately equivalent electrical length and impedance. 19. The sparse switch matrix of claim 16, further comprising: one or more additional sparse matrix modules; one or more common ports; and a set of universal switches interconnecting the sparse matrix modules and the one or more common ports. 20. The sparse switch matrix of claim 19, wherein the set of universal switches is switchable to connect a common port to one or more of the sparse matrix modules. 21. The sparse switch matrix of claim 20, wherein the set of universal switches are interconnected to allow the one or more common ports to be disconnected from the sparse matrix modules. 22. The sparse switch matrix of claim 19, further comprising one or more disconnect switches, wherein each disconnect switch is connected between a port and a corresponding terminal of a respective universal switch. 23. The sparse switch matrix of claim 19, wherein the signal path lengths from a common port to a selected set of other ports are approximately equivalent.
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