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Multicasting in a shared address space 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H04L-012/56
출원번호 UP-0778857 (2004-02-13)
등록번호 US-7539190 (2009-07-01)
발명자 / 주소
  • Stewart, Heath
  • de la Garrigue, Michael
  • Haywood, Chris
  • Reiner, Thomas
  • Wong, Ken
출원인 / 주소
  • Topside Research, LLC
대리인 / 주소
    SoCal IP Law Group LLP
인용정보 피인용 횟수 : 5  인용 특허 : 33

초록

There is disclosed apparatus and methods of multicasting in a shared address space. There may be defined a number of portions of the address space. There may be groups of the portions, and data units addressed to one portion within the group may be re-addressed to the other portions.

대표청구항

The invention claimed is: 1. A method of multicasting data units having destination addresses in a shared memory address space, comprising: dividing the shared memory address space into a plurality of portions, wherein respective individual portions of the shared memory address space are associated

이 특허에 인용된 특허 (33)

  1. Daniel Thomas ; Nattkemper Dieter ; Varma Subir, ATM communication system interconnect/termination unit.
  2. Park Seong-Yong,KRX, ATM switching system for multicast data communication.
  3. Moll,Laurent R.; Rowlands,Joseph B., Addressing scheme supporting fixed local addressing and variable global addressing.
  4. Bienvenu Jacques (Paris FRX) Dufond Patrick (Paris FRX) Carre Claude (la Varenne-St-Hilaire FRX) Tuong Duc L. (Paris FRX) Verdier Henri (Paris FRX) deRivet Philippe-Hubert (Paris FRX) Bradley John J., Apparatus and method for transferring information units between processes in a multiprocessing system.
  5. Sun, Peter C. P.; Lin, Wallace, Architecture of data communications switching system and associated method.
  6. Olnowich Howard Thomas, Bi-directional network adapter for interfacing local node of shared memory parallel processing system to multi-stage switching network for communications with remote node.
  7. Excell, Michael John; Phillips, Ian Lesseter; Urry, Christopher Paul; Hayter, Andrew Timothy, Broadband telecommunications switch.
  8. Olnowich Howard T. (Endwell NY) Lusch Robert F. (Vestal NY) Jabusch John D. (Endwell NY), Broadcast/switching apparatus for executing broadcast/multi-cast transfers over unbuffered asynchronous switching networ.
  9. Akada Yukihisa (Iwatsuki JPX), Control device for use with a drawing output unit.
  10. Grohoski Gregory F. (Cedar Park TX) Mitchell Oscar R. (Pflugerville TX) Nguyen Tung M. (Menlo Park CA) Rim Yongjae (Cedar Park TX), Crossbar switch apparatus and protocol.
  11. Yoav Honig IL; Meir Ohana IL; Amir Lahat IL, Crossbar switching matrix with broadcast buffering.
  12. Chin Hon W. (Palo Alto CA) Scott Frederick (Sunnyvale CA), Extended domain computer network using standard links.
  13. Joseph M. Jeddeloh, Graphics controller embedded in a core logic unit.
  14. Nelson Jeffrey J. ; Jessop Ken N., High performance crossbar switch.
  15. Stormon Charles D. ; Saleh Edward ; Troullinos Nikos B. ; Leong Raymond M., Instruction set for a content addressable memory array with read/write circuits and an interface register logic block.
  16. Stormon Charles D. (Syracuse NY) Chavan Abhijeet (Ann Arbor MI) Troullinos Nikos B. (Syracuse NY) Leong Raymond M. (Los Altos CA 4), Integrated content addressable memory array with processing logical and a host computer interface.
  17. Pradeep S. Sindhu ; Dennis C. Ferguson ; Bjorn O. Liencres ; Nalini Agarwal ; Hann-Hwan Ju ; Raymond Marcelino Manese Lim ; Rasoul Mirzazadeh Oskouy ; Sreeram Veeragandham, Memory organization in a switching device.
  18. Goodwin Paul M. (Littleton MA) Tatosian David A. (Stow MA) Smelser Donald (Bolton MA), Memory stream buffer with variable-size prefetch depending on memory interleaving configuration.
  19. Harrison David Michael ; Ii Alison ; McCutcheon Dadario, Method and processing interface for transferring data between host systems and a packetized processing system.
  20. Chan Lee ; Hitesh Ahuja ; Robert F. Krick, Method and system for bypassing a fill buffer located along a first instruction path.
  21. Schober,Richard L., Method and system to process a multicast request pertaining to a packet received at an interconnect device.
  22. Joseph M. Jeddeloh, Method for providing graphics controller embedded in a core logic unit.
  23. Cotton Charles J. (Hopatcong NJ) Feldman Stuart I. (Harding Township ; Morris County NJ) Sincoskie Walter D. (Union Township ; Union County NJ), Multicast routing algorithm.
  24. Flanders John A. ; Ross Ryan T. ; Townsend William D. ; Lamaire Thomas A. ; Radogna Thomas V. ; Bailey Brian W. ; Sousa Marc D., Multiple protocol support.
  25. Katsube Yasuhiro,JPX ; Yamato Katsumi,JPX ; Matsuzawa Shigeo,JPX, Network node and method of frame transfer.
  26. Dahlgren Kent Blair, Network switch with broadcast support.
  27. Pannell, Donald Robert, Network switch with head of line input buffer queue clearing.
  28. Kumar Vijay P. ; Lin Horng-Dar ; O'Neill Jay Henry ; Oechslin Philippe,CHX ; Ouellette ; III Edward Joseph, Packet network interface.
  29. Bailey, Paul, Prefetch buffer.
  30. Bass, Brian Mitchell; Calvignac, Jean Louis; Heddes, Marco C.; Siegel, Michael Steven; Trombley, Michael Raymond; Verplanken, Fabrice Jean, Queue manager for a buffer.
  31. Yamada Kenji (Tokyo JPX), Shared buffer memory switch for an ATM switching system and its broadcasting control method.
  32. Kempke Robert Alan ; McAuley Anthony J., Ternary CAM memory architecture and methodology.
  33. Hasley Lloyd A. (Carrollton TX), Variable length packet switching system.

이 특허를 인용한 특허 (5)

  1. Freking, Ronald E.; McGlone, Elizabeth A.; Spach, Daniel R.; Wollbrink, Curtis C., Broadcast for a distributed switch network.
  2. Krause, Michael R., Component multicast protocol.
  3. Dobrin, Bruce E., Multicast control of motion capture sequences.
  4. Dobrin, Bruce E., Multicast control of motion capture sequences.
  5. Stewart, Heath; de la Garrigue, Michael; Haywood, Chris; Reiner, Thomas; Wong, Ken, Multicasting computer bus switch.
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