Electronic apparatus and methods of forming the electronic apparatus include a tantalum lanthanide oxynitride film on a substrate for use in a variety of electronic systems. The tantalum lanthanide oxynitride film may be structured as one or more monolayers. Metal electrodes may be disposed on a die
Electronic apparatus and methods of forming the electronic apparatus include a tantalum lanthanide oxynitride film on a substrate for use in a variety of electronic systems. The tantalum lanthanide oxynitride film may be structured as one or more monolayers. Metal electrodes may be disposed on a dielectric containing a tantalum lanthanide oxynitride film.
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What is claimed is: 1. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of TaLnON such that forming the layer of TaLnON includes layering a structure with one of more monolayers. 2. The method of claim 1, wherein the method includes using ato
What is claimed is: 1. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of TaLnON such that forming the layer of TaLnON includes layering a structure with one of more monolayers. 2. The method of claim 1, wherein the method includes using atomic layer deposition to form the layer of TaLnON. 3. The method of claim 1, wherein the method includes forming a metal electrode on and contacting the dielectric layer. 4. The method of claim 3, wherein forming a metal electrode includes forming a metal gate of a transistor. 5. The method of claim 4, wherein forming a metal gate of a transistor includes forming a gate of a silicon MOSFET. 6. The method of claim 4, wherein forming a metal gate of a transistor includes forming a gate of a germanium MOSFET. 7. The method of claim 4, wherein forming a metal gate of a transistor includes forming a gate of a SiGe MOSFET. 8. The method of claim 4, wherein forming a metal electrode includes forming an electrode of a capacitor. 9. The method of claim 4, wherein the method includes forming the dielectric layer and the metal electrode structured as a memory storage capacitor. 10. The method of claim 3, wherein the method includes forming the dielectric layer and the metal electrode structured as a capacitor in an analog integrated circuit. 11. The method of claim 3, wherein the method includes forming the dielectric layer and the metal electrode structured as a capacitor in a RF integrated circuit. 12. The method of claim 3, wherein the method includes forming the dielectric layer and the metal electrode structured as a capacitor in a mixed signal integrated circuit. 13. The method of claim 3, wherein the method includes forming the dielectric layer structured as a tunnel gate insulator in a flash memory and the metal electrode structured as a floating gate in the flash memory. 14. The method of claim 3, wherein the method includes forming the dielectric layer structured as an inter-gate insulator in a flash memory and the metal electrode structured as a control gate in the flash memory. 15. The method of claim 3, wherein the method includes forming the dielectric layer structured as a nanolaminate dielectric in a NROM flash memory. 16. The method of claim 1, wherein the method includes forming a metal electrode on and contacting the dielectric layer, the metal electrode formed by atomic layer deposition. 17. The method of claim 1, wherein the method includes forming a metal electrode on and contacting the dielectric layer, the metal electrode formed by atomic layer deposition. 18. The method of claim 1, wherein forming a metal electrode includes forming the metal electrode by substituting a desired metal material for previously disposed substitutable material. 19. The method of claim 1, wherein forming a metal electrode includes forming a self aligned metal electrode on and contacting the dielectric layer. 20. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of TaLaON, wherein forming the layer of TaLaON includes: forming a layer of TaLaO arranged as a layered structure having one or more monolayers; and nitridizing the TaLaO to form TaLaON. 21. The method of claim 20, wherein the method includes using atomic layer deposition to form the layer of TaLaO. 22. The method of claim 20, wherein the method includes forming a metal electrode on and contacting the dielectric layer. 23. The method of claim 20, wherein nitridizing the TaLaO to form TaLaON includes nitridizing at temperatures equal to or above 500° C. 24. The method of claim 20, wherein nitridizing the TaLaO to form TaLaON includes introducing nitrogen by a microwave plasma. 25. The method of claim 20, wherein nitridizing the TaLaO to form TaLaON includes introducing nitrogen by a NH3 anneal. 26. The method of claim 20, wherein forming a layer of TaLaO includes: forming a layer of tantalum oxide by atomic layer deposition; forming a layer of lanthanum oxide by atomic layer deposition; and annealing the layer of silicon oxide with the layer of lanthanum oxide to form TaLaO. 27. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of TaLaON, wherein forming the layer of TaLaON includes: forming a layer of TaN arranged as a layered structure having one or more monolayers; forming a layer of LaN arranged as a layered structure having one or more monolayers; annealing the layer of TaN with the layer of LaN; and oxidizing the layers of TaN and LaN to form TaLaON. 28. The method of claim 27, wherein forming the layer of TaN includes forming the layer of TaN by atomic layer deposition and forming the layer of LaN includes forming the layer of LaN by atomic layer deposition. 29. The method of claim 27, wherein the method includes forming a metal electrode on and contacting the dielectric layer. 30. The method of claim 27, wherein the annealing and the oxidizing are performed together. 31. The method of claim 27, wherein the layer of TaN and the layer of LaN are annealed and oxidized by rapid thermal oxidation to form TaLaON. 32. The method of claim 27, wherein the method includes forming alternating layers of TaN and LaN prior to annealing. 33. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of TaLaON, wherein forming the layer of TaLaON includes: forming a layer of TaON arranged as a layered structure having one or monolayers; forming a layer of LaON arranged as a layered structure having one or monolayers; and annealing the layer of TaON with the layer of LaONt to form TaLaON. 34. The method of claim 33, wherein forming the layer of TaON includes forming the layer of TaON by atomic layer deposition and forming the layer of LaON includes forming the layer of LaON by atomic layer deposition. 35. The method of claim 33, wherein the method includes forming a metal electrode on and contacting the dielectric layer. 36. The method of claim 33, wherein the method includes forming alternating layers of TaON and LaON prior to annealing. 37. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of TaLaON such that forming the layer of TaLaON includes layering a structure with one or monolayers; and forming a metal electrode on and contacting the dielectric layer, the metal electrode formed by: forming a layer of substitutable material on the dielectric layer, the substitutable material including one or more materials selected from the group consisting of carbon, polysilicon, germanium, and silicon-germanium; and substituting a desired metal material for the substitutable material to provide the metal electrode on the dielectric layer. 38. The method of claim 37, wherein the method includes using atomic layer deposition to form the layer of TaLaON. 39. The method of claim 37, wherein the method including forming a layer of the desired metal material on the layer of substitutable material and heating the layers at a temperature below the eutectic temperature of the desired metal material. 40. The method of claim 37, wherein forming a layer of substitutable material includes forming a carbon structure. 41. The method of claim 40, wherein substituting a desired metal material for the substitutable material includes substituting for the carbon structure one or more materials from the group consisting of gold, silver, a gold alloy, a silver alloy, copper, platinum, rhenium, ruthenium, rhodium, nickel, osmium, palladium, iridium, and cobalt. 42. The method of claim 37, wherein forming a layer of substitutable material includes forming one or more of polysilicon, germanium, or silicon-germanium. 43. The method of claim 42, wherein substituting a desired metal material for the substitutable material includes substituting one or more materials from the group consisting of aluminum, copper, silver, gold, and alloys of silver and gold. 44. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of TaLaON, wherein forming the layer of TaLaON includes layering a structure with one or more monolayers; and forming a self aligned metal electrode on and contacting the dielectric layer using a previously disposed sacrificial carbon layer on the dielectric layer and sacrificial carbon sidewall spacers adjacent to the sacrificial carbon layer. 45. The method of claim 44, wherein the method includes using atomic layer deposition to form the layer of TaLaON. 46. The method of claim 44, wherein forming a self aligned metal electrode includes forming a sacrificial carbon gate on the dielectric layer; forming sacrificial carbon sidewall spacers adjacent to the sacrificial carbon gate; forming source/drain regions for a transistor using the sacrificial carbon sidewall spacers to define the source/drain regions; replacing the sacrificial carbon sidewall spacers with non-carbon sidewall spacers; and replacing the sacrificial carbon gate with a desired metal gate material. 47. The method of claim 46, wherein replacing the sacrificial carbon sidewall spacers with non-carbon sidewall spacers includes performing a plasma oxidation process to remove the carbon sidewall spacers. 48. The method of claim 46, wherein replacing the sacrificial carbon gate with a desired metal gate material includes replacing the sacrificial carbon gate with one or more materials from a group consisting of aluminum, tungsten, molybdenum, gold, alloys of gold, silver, alloys of silver, platinum, rhenium, ruthenium, rhodium, nickel, osmium, palladium, iridium, cobalt, and germanium. 49. A method comprising: forming an array of memory cells on a substrate, each memory cell including a dielectric layer having a layer of TaLaON, wherein forming the layer of TaLaON formed includes layering a structure with one or more monolayers. 50. The method of claim 49, where the method includes: forming a layer of TaLaO using atomic layer deposition; and nitridizing the TaLaO to form TaLaON. 51. The method of claim 49, where the method includes: forming a layer of TaN by atomic layer deposition; forming a layer of LaN by atomic layer deposition; annealing the layer of TaN with the layer of LaNt; and oxidizing the layers of TaN and the LaNt to form TaLaON. 52. The method of claim 49, where the method includes: forming a layer of TaON by atomic layer deposition; forming a layer of LaON by atomic layer deposition; and annealing the layer of TaON with the layer of LaONt to form TaLaON. 53. The method of claim 49, wherein the method includes forming a metal electrode on and contacting the dielectric layer, forming the metal electrode including: forming a layer of substitutable material on the dielectric layer; and substituting a desired metal material for the substitutable material to provide the metal electrode on the dielectric layer. 54. The method of claim 53, wherein forming a layer of substitutable material includes forming a structure having one of more materials of a group consisting of carbon, polysilicon, germanium, and silicon-germanium. 55. The method of claim 53, wherein substituting a desired metal material for the substitutable material includes substituting one or more materials from the group consisting of aluminum, gold, silver, a gold alloy, a silver alloy, copper, platinum, rhenium, ruthenium, rhodium, nickel, osmium, palladium, iridium, and cobalt. 56. The method of claim 49, wherein the method includes forming a metal gate on and contacting the dielectric layer to form a transistor, the metal gate formed by: forming a sacrificial carbon gate on the dielectric layer; forming sacrificial carbon sidewall spacers adjacent to the sacrificial carbon gate; forming source/drain regions for the transistor using the sacrificial carbon sidewall spacers to define the source/drain regions; replacing the sacrificial carbon sidewall spacers with non-carbon sidewall spacers; and replacing the sacrificial carbon gate with a desired metal gate material to provide the desired metal gate material on the gate dielectric. 57. The method of claim 56, wherein replacing the sacrificial carbon gate with a desired metal gate material includes replacing the sacrificial carbon gate with one or more materials from a group consisting of aluminum, tungsten, molybdenum, gold, alloys of gold, silver, alloys of silver, platinum, rhenium, ruthenium, rhodium, nickel, osmium, palladium, iridium, cobalt, and germanium. 58. A method comprising: providing a controller; coupling an electronic device to the controller, the electronic device having a dielectric layer on a substrate for an integrated circuit, the dielectric layer having a layer of TaLaON, the layer of TaLaON formed by layering a structure with one or more monolayers. 59. The method of claim 58, where the method includes: forming a layer of tantalum oxide by atomic layer deposition; forming a layer of lanthanum oxide by atomic layer deposition; annealing the layer of tantalum oxide with the layer of lanthanum oxide to form TaLaO; and nitridizing the TaLaO to form TaLaON. 60. The method of claim 58, where the method includes: forming a layer of TaN by atomic layer deposition; forming a layer of LaN by atomic layer deposition; annealing the layer of TaN with the layer of LaN; and oxidizing the layers of TaN and the LaNt to form TaLaON. 61. The method of claim 58, where the method includes: forming a layer of TaON by atomic layer deposition; forming a layer of LaON by atomic layer deposition; and annealing the layer of TaON with the layer of LaONt to form TaLaON. 62. The method of claim 58, wherein the method includes forming a metal electrode on and contacting the dielectric layer. 63. The method of claim 62, wherein forming a metal electrode includes forming the metal electrode by atomic layer deposition. 64. The method of claim 62, wherein forming a metal electrode includes forming the metal electrode by substituting a desired metal material for previously disposed substitutable material. 65. The method of claim 62, wherein forming a metal electrode includes forming a self aligned metal electrode on and contacting the dielectric layer using a previously disposed sacrificial carbon gate on the dielectric layer and sacrificial carbon sidewall spacers adjacent to the sacrificial carbon gate. 66. The method of claim 58, wherein providing a controller includes providing a processor. 67. The method of claim 58, wherein coupling an electronic device to the controller includes coupling a memory to the controller. 68. The method of claim 58, wherein the method includes forming an information handling system. 69. The method of claim 68, wherein forming an information handling system includes forming a portable wireless device.
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