IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
UP-0695643
(2003-10-29)
|
등록번호 |
US-7547933
(2009-07-01)
|
우선권정보 |
JP-2002-316733(2002-10-30) |
발명자
/ 주소 |
- Takamatsu, Tomohiro
- Watanabe, Junichi
- Nakamura, Ko
- Wang, Wensheng
- Sato, Naoyuki
- Dote, Aki
- Nomura, Kenji
- Horii, Yoshimasa
- Kurasawa, Masaki
- Takai, Kazuaki
|
출원인 / 주소 |
- Fujitsu Microelectronics Limited
|
대리인 / 주소 |
Westerman, Hattori, Daniels & Adrian, LLP.
|
인용정보 |
피인용 횟수 :
8 인용 특허 :
13 |
초록
▼
There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111
There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.
대표청구항
▼
What is claimed is: 1. A semiconductor device comprising: an insulating film formed over a semiconductor substrate; an adhesive layer made of alumina formed on the insulating film; a capacitor lower electrode formed on the adhesive layer; a ferroelectric layer formed on the capacitor lower electrod
What is claimed is: 1. A semiconductor device comprising: an insulating film formed over a semiconductor substrate; an adhesive layer made of alumina formed on the insulating film; a capacitor lower electrode formed on the adhesive layer; a ferroelectric layer formed on the capacitor lower electrode, and having an ABO3 perovskite structure that contains Ir in at least one of an A site and a B site (A=any one of Bi, Pb, Ba, Sr, Ca, Na, K, and a rare earth element, B=any one of Ti, Zr, Nb, Ta, W, Mn, Fe, Co, and Cr); and a capacitor upper electrode formed on the ferroelectric layer, wherein roughness of an upper surface of the adhesive layer is 0.79 nm or less. 2. A semiconductor device according to claim 1, wherein a (111) orientation of the ferroelectric layer has an inclination of 3.5° or less from a perpendicular direction of an upper surface of the semiconductor substrate. 3. A semiconductor device according to claim 1, wherein the ferroelectric layer is material that has PZT as a main component. 4. A semiconductor device according to claim 1, wherein a (111) orientation of the lower electrode has an inclination of 2.3° or less from the perpendicular direction of the upper surface of the semiconductor substrate. 5. A semiconductor device according to claim 1, wherein the lower electrode is made of platinum. 6. A semiconductor device according to claim 1, wherein the upper electrode is made of iridium oxide or iridium. 7. A semiconductor device comprising: an insulating film formed over a semiconductor substrate; an adhesive layer made of alumina formed on the insulating film and having a surface roughness of 0.79 nm or less; a capacitor lower electrode formed on the adhesive layer, and having a (111) orientation that is inclined from a perpendicular direction of an upper surface of the semiconductor substrate by 2.3° or less; a ferroelectric layer formed on the capacitor lower electrode, and having an ABO3 perovskite structure (A=any one of Bi, Pb, Ba, Sr, Ca, Na, K, and a rare earth element, B=any one of Ti, Zr, Nb, Ta, W, Mn, Fe, Co, and Cr); and a capacitor upper electrode formed on the ferroelectric layer. 8. A semiconductor device according to claim 7, wherein a (111) orientation of the ferroelectric layer is inclined from a perpendicular direction of an upper surface of the semiconductor substrate by 3.5° or less. 9. A semiconductor device according to claim 7, wherein the lower electrode is made of any one of a platinum layer, an iridium layer, a platinum-containing layer, and an iridium-containing layer. 10. A semiconductor device according to claim 7, wherein the ferroelectric layer is made of material that contains PZT as a main component, or PZT. 11. A semiconductor device according to claim 7, further comprising: a hole formed in the insulating film and the adhesive layer under the lower electrode; and a conductive plug formed in the hole and connected to the lower electrode. 12. A semiconductor device according to claim 11, wherein an oxygen barrier metal layer is formed between the conductive plug and the lower electrode. 13. A semiconductor device according to claim 12, wherein the oxygen barrier metal layer constitutes a part of the lower electrode. 14. A semiconductor device according to claim 2, wherein a (111) orientation of the lower electrode has an inclination of 2.3° or less from the perpendicular direction of the upper surface of the semiconductor substrate.
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