IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
UP-0684575
(2007-03-09)
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등록번호 |
US-7551027
(2009-07-01)
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발명자
/ 주소 |
- Salove, Matthew J.
- Davenport, William H.
- Parkhurst, Ray M.
- Cho, Jin W.
|
출원인 / 주소 |
- Tri Quint Semiconductor, Inc.
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
1 인용 특허 :
17 |
초록
▼
An apparatus and method is disclosed for providing a mirror circuit for detecting a change in current of a RF power amplifier. The mirror circuit includes a voltage operably coupled with the mirror circuit, a bias circuit operably coupled with the mirror circuit, wherein the bias circuit is capable
An apparatus and method is disclosed for providing a mirror circuit for detecting a change in current of a RF power amplifier. The mirror circuit includes a voltage operably coupled with the mirror circuit, a bias circuit operably coupled with the mirror circuit, wherein the bias circuit is capable of applying a bias voltage to the mirror circuit, and an output reference signal. The output reference signal is proportional to the change of current in the RF power amplifier.
대표청구항
▼
What is claimed is: 1. A mirror circuit, comprising: a voltage operably coupled with the mirror circuit; a bias circuit operably coupled with the mirror circuit, the bias circuit capable of applying a bias voltage to the mirror circuit; a first transistor having a base and a collector, the base of
What is claimed is: 1. A mirror circuit, comprising: a voltage operably coupled with the mirror circuit; a bias circuit operably coupled with the mirror circuit, the bias circuit capable of applying a bias voltage to the mirror circuit; a first transistor having a base and a collector, the base of the first transistor operably coupled with the bias circuit through at least one resistor; a second transistor having a base, a collector, and an emitter, the emitter of the second transistor operably coupled with the collector of the first transistor, wherein the collector of the second transistor provides the output reference signal; a voltage divider circuit for setting the bias voltage of the second transistor, the voltage divider circuit operably coupled to the base of the second transistor and a diode, wherein the diode is operably coupled between the voltage divider circuit and the voltage; and an output reference signal. 2. The circuit of claim 1, further comprising: a third transistor having a base, a collector, and an emitter, the base of the third transistor operably coupled with the collector of the third transistor and the emitter of the third transistor operably coupled with a ground; a fourth transistor having a base, a collector, and an emitter, the base of the fourth transistor operably coupled with the collector of the fourth transistor, the emitter of the fourth transistor operably coupled with the collector of the third transistor, and at least one resistor operably between the collector of the fourth transistor and the voltage. 3. The circuit of claim 1, further comprising: a capacitor operably coupled between the collector of the first transistor and the emitter of the first transistor. 4. The circuit of claim 1, further comprising: at least one resistor operably coupled between the base of the first transistor and the bias voltage. 5. The circuit of claim 1, further comprising an output stage capable of amplifying a radio frequency (RF) signal. 6. The circuit of claim 5, wherein the output stage is operably coupled to an output load. 7. The circuit of claim 5, wherein the output stage comprises: an output transistor having a base and a collector, the collector of the output transistor operably coupled with the output load; and at least one inductor operably coupled between the collector of the output transistor and the voltage. 8. The circuit of claim 7, wherein one or more capacitors operably couple the RF signal between the base of the first transistor and base of the output transistor. 9. The circuit of claim 7, wherein the first transistor further comprises an emitter and the output transistor further comprises an emitter, the emitter of the first transistor operably coupled to the emitter of the output transistor. 10. The circuit of claim 7, further comprising a capacitor operably coupled between the output transistor and the output load. 11. The circuit of claim 7, wherein the voltage is a battery voltage. 12. The circuit of claim 7, wherein the mirror circuit is capable of detecting a change in current of the output stage and in response, providing the output reference signal that is proportional to the change of current in the output stage. 13. The circuit of claim 7, further comprising: at least one resistor operably coupled between the base of the output transistor and the bias voltage. 14. The circuit of claim 7, wherein the mirror circuit is fabricated in Gallium Arsenide (GaAs). 15. The circuit of claim 7, wherein the mirror circuit is fabricated in a semiconductor field effect transistor technology selected from the group consisting of: pseudomorphic high electron mobility transistor; metal semiconductor field effect transistor; junction field effect transistor; high electron mobility transistor; metamorphic high electron mobility transistor; heterostructure field effect transistor; and modulation-doped field effect transistor. 16. The circuit of claim 15, wherein the semiconductor technology includes material selected from the group consisting of: Gallium Arsenide; Indium Phosphide; Gallium Nitride; Aluminum Gallium Arsenide; Indium Gallium Arsenide; Indium Gallium Phosphide; Indium Aluminum Arsenide; Aluminum Gallium Nitride; Indium Gallium Nitride; Gallium Arsenide Antimonide; Indium Gallium Arsenide Nitride; and Aluminum Arsenide. 17. A wireless device, comprising: a transmitter for transmitting RF signals, the transmitter comprising: an output power amplifier stage; and a mirror circuit operably coupled with the output power amplifier stage for detecting a change in current of the output power amplifier stage, wherein the mirror circuit comprises: a voltage operably coupled with the mirror circuit; a bias circuit operably coupled with the mirror circuit, the bias circuit capable of applying a bias voltage to the mirror circuit; and an output reference signal; a battery connected to the transmitter of the wireless device; a first transistor having a base and a collector, the base of the first transistor operably coupled with the bias circuit through at least one resistor; a second transistor having a base, a collector, and an emitter, the emitter of the second transistor operably coupled with the collector of the first transistor, wherein the collector of the second transistor provides the output reference signal; and a voltage divider circuit for setting the bias voltage of the second transistor, the voltage divider circuit operably coupled to the base of the second transistor and a diode, wherein the diode is operably coupled between the voltage divider circuit and the voltage; and an antenna operably coupled to the output power amplifier stage of the transmitter. 18. The wireless device of claim 17, further comprising: a third transistor having a base, a collector, and an emitter, the base of the third transistor operably coupled with the collector of the third transistor and the emitter of the third transistor operably coupled with a ground; a fourth transistor having a base, a collector, and an emitter, the base of the fourth transistor operably coupled with the collector of the fourth transistor, the emitter of the fourth transistor operably coupled with the collector of the third transistor, and at least one resistor operably between the collector of the fourth transistor and the voltage. 19. The wireless device of claim 18, wherein the output power amplifier stage comprises: an output transistor having a base and a collector, the collector of the output transistor operably coupled with the antenna; and at least one inductor operably coupled between the collector of the output transistor and the voltage. 20. The wireless device of claim 19, wherein the first transistor further comprises an emitter and the output transistor further comprises an emitter, the emitter of the first transistor operably coupled to the emitter of the output transistor. 21. The wireless device of claim 20, wherein the mirror circuit is capable of detecting a change in current of the output power amplifier stage and in response, providing the output reference signal that is proportional to the change of current in the output power amplifier stage. 22. The wireless device of claim 20, wherein the voltage is the battery voltage.
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