IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
UP-0487681
(2002-09-09)
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등록번호 |
US-7577822
(2009-08-31)
|
우선권정보 |
EP-01129923(2001-12-14); DE-102 06 856(2002-02-18) |
국제출원번호 |
PCT/EP02/010084
(2002-09-09)
|
§371/§102 date |
20040805
(20040805)
|
국제공개번호 |
WO03/025770
(2003-03-27)
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발명자
/ 주소 |
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출원인 / 주소 |
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
21 인용 특허 :
404 |
초록
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A reconfigurable processor (VPU) is designed for a technical environment having a standard processor (CPU) which has, for example, a DSP, RISC, CISC processor or a (micro)controller. The VPU and the CPU are coupled to form a processor-coprocessor arrangement. For the coupling, the CPU executes a pro
A reconfigurable processor (VPU) is designed for a technical environment having a standard processor (CPU) which has, for example, a DSP, RISC, CISC processor or a (micro)controller. The VPU and the CPU are coupled to form a processor-coprocessor arrangement. For the coupling, the CPU executes a program and provides, during the execution, configuration related information, in accordance with the configuration related information; a configuration load unit is instructed to load a configuration into the VPU and responsively loads the configuration into the VPU; the VPU processes data in accordance with the configuration; the CPU parallelly processes data by continuing the program execution if it can be continued without waiting for output of the VPU's data processing or, otherwise, executing a different program; and synchronization signals are transferred between the CPU and the VPU to synchronize the data processing of the VPU and CPU.
대표청구항
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What is claimed is: 1. A method for processing data in a programmed manner, comprising: coupling a standard processor and a reconfigurable coprocessor, the coupling forming a processor-coprocessor arrangement; executing, by the standard processor, at least one of a program and a task of the program
What is claimed is: 1. A method for processing data in a programmed manner, comprising: coupling a standard processor and a reconfigurable coprocessor, the coupling forming a processor-coprocessor arrangement; executing, by the standard processor, at least one of a program and a task of the program; during the executing of the at least one of the program and the task of the program, the standard processor providing to the reconfigurable coprocessor configuration related information in accordance with which the reconfigurable coprocessor reads the configuration from a configuration memory and configures the read configuration onto the reconfigurable processor; writing the configuration related information into a link list, wherein: the configuration is determined based on the link list; and the link list includes termination information regarding termination of the configuration; processing data, by the reconfigurable coprocessor, in accordance with the at least one configuration; during the data processing by the reconfigurable coprocessor, parallelly processing data by the standard processor by one of (a) continuing the executing of the at least one of the program and the task of the program and (b) executing at least one of a different program and a different task of one of the program and the different program, wherein the continuing the executing is performed if an end of the at least one of the program and the task of the program has not yet been reached and the continuing the executing is performable independent of unavailable output of the data processing by the reconfigurable coprocessor, and the executing the at least one of the different program and the different task is otherwise performed; transferring synchronization signals between the standard processor and the reconfigurable coprocessor to synchronize the data processing by the standard processor and the data processing by the reconfigurable coprocessor; and to synchronize the data processing by the standard processor and the data processing by the reconfigurable coprocessor: using the termination information; providing the link list with information indicating an execution progress of the configuration that is configured onto the reconfigurable coprocessor; and polling the link list. 2. The method of claim 1, further comprising: determining, by a scheduler, which of the (a) continuing the execution and the (b) execution of the at least one of the different program and the different task is to be performed; and controlling the standard processor, by the scheduler, in accordance with the determination. 3. The method of claim 2, wherein: the determining by the scheduler includes determining whether (a) the continuing the execution is dependent on an output of the reconfigurable coprocessor and (b) the output is available to the standard processor at the moment of the determination; and if the end of the program has not yet been reached, the scheduler controls the standard processor to execute the at least one of the different program and the different task responsive to a determination that (a) and not (b). 4. The method of claim 1, wherein the synchronization signals include an interrupt request. 5. The method of claim 1, wherein: the standard processor is one of a digital signal processor (DSP), a micro-controller, and a central processing unit (CPU); and the reconfigurable coprocessor includes a plurality of coarse granular runtime reconfigurable elements. 6. The method of claim 1, wherein the configuration related information includes a pointer to at least one location in the configuration memory from which the configuration is read, and a pointer to at least one memory location which stores at least one of operand and result data of the processing performed by the reconfigurable coprocessor. 7. The method of claim 1, wherein the reconfigurable coprocessor is runtime reconfigurable. 8. The method of claim 1, further comprising: in an instance where the execution of the at least one of the program and the task of the program being executed requires the reconfigurable coprocessor as a resource, checking, by the reconfigurable coprocessor, an availability of the reconfigurable coprocessor; wherein the at least one of the different program and the different task is selected for execution on the standard processor if the reconfigurable coprocessor is unavailable.
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