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An application program is executed and is easily made reusable by dividing the application program into processing units, and by creating a logical circuit in the reconfigurable hardware by switching so as to improve the processing speed at low cost. The electronic computer comprises a processing de

An application program is executed and is easily made reusable by dividing the application program into processing units, and by creating a logical circuit in the reconfigurable hardware by switching so as to improve the processing speed at low cost. The electronic computer comprises a processing device 70. The processing device 70 includes a processor 90 having reconfigurable hardware that can create a logical circuit with a program and a memory unit 80 storing a program used to decide creation of a logical circuit of the processor 90. The electronic computer further comprises a control device 60 that executes a command specified by the processing device 70. The processor 90 issues an instruction to execute the command when the processing device 70 detects a predetermined condition. The commands include a command that replaces the program stored in the memory unit 80 and a command that switches effective program data memories when the memory unit 80 is configured by a plurality of program data memories 81.

대표청구항 ▼

The invention claimed is: 1. A system comprising a dividing device that executes a dividing program, wherein the dividing program divides an application program into a plurality of processing units and generates program data and command code sequences executed by an electronic computer, said system

The invention claimed is: 1. A system comprising a dividing device that executes a dividing program, wherein the dividing program divides an application program into a plurality of processing units and generates program data and command code sequences executed by an electronic computer, said system comprising: said electronic computer, comprising: a processing device and a control device; said processing device including reconfigurable hardware for each of said processing units, wherein said processing device comprises: a processing element with reconfigurable hardware, a plurality of program data memories, each holding a program that creates a logic circuit directly in said reconfigurable hardware for each of said processing units, an effective block selection unit that connects one of said program data memories to said processing element; wherein said control device executes a command specified by the processing device, wherein said command is instructed to be executed when the processing device detects a predetermined condition and said command switches which program is input to said processing element logically creating the reconfigurable hardware; wherein said program is generated with a control flow of the application program, completion data, structural information of the electronic computer and a plurality of command sets of the electronic computer as inputs; wherein said dividing program executes a control flow analysis procedure that divides the application program into a plurality of said processing units and generates a command sequence intermediate code; and wherein said dividing program executes a command sequence implementation procedure for translating said command sequence intermediate code into a data string that can be executed by the control device, wherein said control device interprets and executes: an activate command selecting one of said program data memories and activating said processing element to start processing a program held in the selected program data memory; a halt command halting operation of said processing device; a load_prg command transferring program data from a specified memory device to one of said program data memories, wherein a parameter of the load_prg command indicates a region of one of said program data memories where the program data is stored; a cancel_prg command canceling a load_prg operation, and a wait_prg command waiting until completion of the load_prg operation. 2. The system as defined in claim 1, wherein the electronic computer comprises a command code memory, holding commands that said control device executes, wherein said control device comprises a command code reference device reading commands from the command code memory according to an address specified by said processing device, interpreting, and executing the commands. 3. The system as defined in claim 2, wherein said command code reference device comprises an address counter holding the address of said command code memory, and in the exchange of commands between said processing device and said control device, a first address control line indicating that an address signal line outputted by said processing device is effective, and a second address counter control line instructing whether the value of the address signal line is stored in the address counter as it is or the result of adding the value of the address signal line to the value of the address counter is stored in the address counter when the first control line is effective. 4. The system as defined in claim 3, wherein said commands are stored in said command code memory in a format comprising a command code that classifies the commands, an address counter control code, and a flag that indicates whether or not the following command is executed, and said address counter control code includes a load_adr command setting the value of the address counter and a add_adr command adding a specified value to the address counter. 5. The system as defined in claim 4, wherein said address counter control code includes a push_adr command that hides the value of the address counter in an address counter stack provided in said control device and that sets a new value to the address counter, and a pop_adr command that returns the value of the address counter stack to the address counter. 6. The system as defined in claim 1, wherein the electronic computer comprises a cache device including a cache memory that temporarily holds data to be transferred to said processing device and a cache controller that controls the cache memory wherein the cache controller is controlled by a command issued by said processing device. 7. The system as defined in claim 6, wherein said cache device comprises an address translation device that translates an address defined externally to said processing device into an address defined inside of the processing device, and the address translation device is controlled by a command issued by said processing device. 8. A system comprising: a dividing device that divides an application program into a plurality of processing units; a processing device including reconfigurable hardware that creates a logic circuit for each said processing unit by executing a respective program, wherein said program is generated, given a control flow of the application program, completion data, structural information of the electronic computer and a plurality of command sets of the electronic computer as inputs, by executing a control flow analysis procedure that generates a command sequence, wherein the dividing device executes a command sequence implementation procedure that translates said command sequence into a data string, and executes a program data generation procedure that generates program data; and a control device that executes a command specified by the processing device; wherein said command is instructed to be executed when the processing device detects a predetermined condition and wherein the command switches which program is input to said reconfigurable hardware logically creating the reconfigurable hardware; and said processing device comprises a second reconfigurable hardware that creates a logic circuit by executing a program and a second control device that executes a command specified by the second reconfigurable hardware, wherein said first and second control device interprets and executes: an activate command selecting one of multiple program data memories and activating said reconfigurable hardware to start processing a program held in the selected program data memory; a halt command halting operation of said processing device; a load_prg command transferring program data from a specified memory device to one of said program data memories, wherein a parameter of the load_prg command indicates a region of one of said program data memories where the program data is stored; a cancel_prg command canceling a load_prg command, and a wait_prg command waiting until completion of the load_prg command. 9. The system as defined in claim 1, wherein the electronic computer is implemented on a semiconductor integrated circuit. 10. A control method in a system for switching and executing programs generated by dividing an application program into a plurality of processing units, wherein said system comprises an electronic computer that includes a control device and a processing device with reconfigurable hardware that creates a logic circuit for each of said processing units, said control method comprising: issuing a command to the control device by the processing device when the processing device detects a predetermined condition, generating a program, given a control flow of the application program, completion data, structural information of the electronic computer and a plurality of command sets of the electronic computer as inputs, by executing a control flow analysis procedure that generates a command sequence, wherein the command sequence is executed by said control device, executing a command sequence implementation procedure that translates said command sequence into a data string, executing a program data generation procedure that generates program data; switching said programs that logically create reconfigurable hardware by said control device that has executed the command from the processing device; interpreting and executing: an activate command selecting one of multiple program data memories and activating said processing device to start processing a program held in the selected program data memories; a halt command halting operation of said processing device; a load_prg command transferring program data from a specified memory device to one of said program data memories, wherein a parameter of the load_prg command indicates a region of one of said program data memories where the program data is stored; a cancel_prg command canceling a load_prg command, and a wait_prg command waiting until completion of the load_prg command. 11. The control method as defined in claim 10, wherein, after said switching, while a program in a predetermined program data memory is being executed, a next program is read into another program data memory. 12. A control method, in a system for switching and executing programs generated by dividing an application program into a plurality of processing units, wherein said system comprises an electronic computer that includes a control device and a processing device with reconfigurable hardware that creates a logic circuit for each of said processing units, said control method comprising: issuing a command to the control device by the processing device when the processing device detects a predetermined condition, said processing device including reconfigurable hardware and a plurality of program data memories that hold programs for each said processing unit, wherein said programs are generated, given a control flow of the application program, completion data, structural information of the electronic computer and a plurality of command sets of the electronic computer as inputs, by executing a control flow analysis procedure that generates a command sequence, wherein the command sequence is executed by said control device, executing a command sequence implementation procedure that translates said command sequence into a data string, and executing a program data generation procedure that generates program data, creating logic circuits of the reconfigurable hardware, wherein an effective block selection unit selects one program data memory from the plurality of program data memories and makes it effective; executing, by said control device that has received the command from the processing device, an activate command controlling the effective block selection unit so as to make a specified program data memory effective and connecting it to the reconfigurable hardware; switching the content of a logic circuit in the reconfigurable hardware; interpreting and executing: an activate command selecting one of said program data memories and activating said processing element to start processing a program held in one of the selected program data memories; a halt command halting operation of said processing device; a load_prg command transferring program data from a specified memory device to one of said program data memories, wherein a parameter of the load_prg command indicates a region of one of said program data memories where the program data is stored; a cancel_prg command canceling a load_prg command, and a wait_prg command waiting until completion of the load_prg command. 13. The control method as defined in claim 12, wherein said control device executes: an interrupt command issuing an interrupt vector from said control device to said specified processing device. 14. A program generation method for an electronic computer executing an application program divided into a plurality of processing units, wherein said electronic computer includes a control device and a processing device with reconfigurable hardware that can create a logic circuit for each of said processing units, comprising: analyzing a control flow of the application program; implementing a command sequence procedure in which a command sequence is generated by translating a command sequence intermediate code into a form that can be executed by the electronic computer; and generating program data in which operational content of a processing unit is translated into a form that can be executed by the electronic computer, wherein the application program is divided so that multiple program data memories hold a program creating a logic circuit for each processing unit in said reconfigurable hardware when the control flow of the application program is analyzed and divided into processing units during said analyzing a control flow step; wherein the control device interprets and executes: an activate command selecting one of said program data memories and activating said processing element to start processing a program held in one of the selected program data memories; a halt command halting operation of said processing device; a load_prg command transferring program data from a specified memory device to one of said program data memories, wherein a parameter of the load_prg command indicates a region of one of said program data memories where the program data is stored; a cancel_prg command canceling a load_prg command, and a wait_prg command waiting until completion of the load_prg command. 15. A computer program product for switching and executing programs on an electronic computer, the programs generated by dividing an application program into a plurality of processing units, wherein said electronic computer includes a control device and a processing device with reconfigurable hardware that can create a logic circuit for each of said processing units, the computer program product embodied in a computer readable medium, which when executed, causes a computer system to perform the steps of: issuing a command to the control device by the processing device when the processing device detects a predetermined condition, generating a program, given a control flow of the application program, completion data, structural information of the electronic computer and a plurality of command sets of the electronic computer as inputs, by executing a control flow analysis procedure that generates a command sequence, wherein the command sequence is executed by said control device, executing a command sequence implementation procedure that translates said command sequence into a data string, and executing a program data generation procedure that generates program data executed by the processing device; switching said program that logically creates reconfigurable hardware by said control device that has executed the command from the processing device; interpreting and executing: an activate command selecting one of multiple program data memories and activating said processing device to start processing a program held in the selected program data memory; a halt command halting operation of said processing device; a load_prg command transferring program data from a specified memory device to one of said program data memories, wherein a parameter of the load_prg command indicates a region of one of said program data memories where the program data is stored; a cancel_prg command canceling a load_prg command, and a wait_prg command waiting until completion of the load_prg command. 16. A computer program product, for switching and executing programs on an electronic computer, the programs generated by dividing an application program into a plurality of processing units, wherein said electronic computer includes a control device and a processing device with reconfigurable hardware that can create a logic circuit for each of said processing units, the computer program product embodied in a computer readable medium, which when executed causes a computer system to perform the steps of: issuing a command to the control device by the processing device when the processing device detects a predetermined condition, said processing device including a plurality of program data memories that hold programs for each said processing unit, wherein said programs are generated, given a control flow of the application program, completion data, structural information of an electronic computer and a plurality of command sets of the electronic computer as inputs, by executing a control flow analysis procedure that generates a command sequence, executing a command sequence implementation procedure that translates said command sequence into a data string, and executing a program data generation procedure that generates program data using the processing device, creating logic circuits of the reconfigurable hardware, wherein an effective block selection unit selects one program data memory from the plurality of program data memories and makes it effective; executing, by the control device that has received the command from the processing device, an activate command controlling the effective block selection unit so as to make a specified program data memory effective and connecting it to the reconfigurable hardware; switching the content of a logic circuit in the reconfigurable hardware; interpreting and executing: an activate command selecting one of said program data memories and activating said processing element to start processing a program held in one of the selected program data memories; a halt command halting operation of said processing device; a load_prg command transferring program data from a specified memory device to one of said program data memories, wherein a parameter of the load_prg command indicates a region of one of said program data memories where the program data is stored; a cancel_prg command canceling a load_prg command, and a wait_prg command waiting until completion of the load_prg command. 17. The computer program product, embodied in a computer readable medium as defined in claim 16, wherein an interrupt command issues an interrupt vector from said control device to said specified processing device.