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A probe apparatus for probing a device on a semiconductor wafer to be tested by a testing equipment is provided. The probe apparatus includes a replaceable probe tile removably mounted in a probing location on a base plate. The probe tile is configured into a self-contained assembly which includes a

A probe apparatus for probing a device on a semiconductor wafer to be tested by a testing equipment is provided. The probe apparatus includes a replaceable probe tile removably mounted in a probing location on a base plate. The probe tile is configured into a self-contained assembly which includes a chassis body containing a plurality of probes for probing devices on a wafer, a dielectric block for supporting the probes, and a wireguide for guiding a plurality of cables from the testing equipment into the chassis body. A wafer station having replaceable base plates and replaceable probe tiles are also provided.

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What is claimed is: 1. A probe apparatus for probing a device on a semiconductor wafer to be tested by a testing equipment, comprising: a base plate having a plurality of probing slots; a probe tile being configured into a self-contained assembly, mounted and removable from one of the probing slots

What is claimed is: 1. A probe apparatus for probing a device on a semiconductor wafer to be tested by a testing equipment, comprising: a base plate having a plurality of probing slots; a probe tile being configured into a self-contained assembly, mounted and removable from one of the probing slots on the base plate to another probing slot on the base plate; and a guide mechanism, wherein the guide mechanism comprises: an adapter to receive the base plate; and a plurality of knobs for adjusting a tilting angle of the base plate so that the base plate aligns with the wafer. 2. The probe apparatus of claim 1, wherein the guide mechanism further comprises an interface member configured and arranged to fit the base plate in the adapter. 3. The probe apparatus of claim 2, wherein the base plate comprises: a mechanism for providing a precise location for the probe tile to test the device on the wafer.