초록 ▼

Disclosed is a method and a system for performing N-ary modulation in which bit errors may be reduced against symbol error. A binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a numb

Disclosed is a method and a system for performing N-ary modulation in which bit errors may be reduced against symbol error. A binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 12 and sequentially doubled, that is, any one of 12, 24, 48, 96, . . . , and wherein n is such that, if the bit length n is 7, 9, 11, 13, . . . , the number N is 12, 24, 48, 96, . . . , respectively, two out of the n bits are allocated for identifying four quadrants of the first phase plane, two out of the remaining (n-2) bits are allocated for identifying four quadrants of the second phase plane. The binary signal of three out of the n bits is converted into two digits of ternary signals (T1, T2). The ternary signals are mapped to the first and second phase planes with rotational symmetry of 90° or with axial symmetry.

대표청구항 ▼

What is claimed is: 1. An N-ary modulation method comprising the step of associating a binary signal, a bit length thereof being n, with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belongin

What is claimed is: 1. An N-ary modulation method comprising the step of associating a binary signal, a bit length thereof being n, with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 3 and sequentially doubled, that is, any one of 3, 6, 12, 24, 48, 96, . . . , and wherein n is such that, if the bit length n is 3, 5, 7, 9, 11, 13, . . . , the number N is 3, 6, 12, 24, 48, 96, . . . , respectively, said method further comprising the step of associating, by an N-ary modulation system, in allocating three bits, out of said n bits, of said binary signal to two digits of ternary signals, said three-bit binary signal with said two digits of ternary signals, so as to substantially minimize the average error rate of respective bits of the three-bit binary signal against all errors with the Lee distance of 1 of said two digits of ternary signals. 2. An N-ary modulation method in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 12 and sequentially doubled, that is, any one of 12, 24, 48, 96, . . . , and wherein n is such that, if the bit length n is 7, 9, 11, 13, . . . , the number N is 12, 24, 48, 96, . . . , respectively, said method further comprising the steps of: converting, by an N-ary modulation system, three bits of the binary signal, out of said n bits, into two digits of ternary signals; and mapping said two digits of ternary signals with rotational symmetry of 90° to said first and second phase planes, respectively. 3. An N-ary modulation method in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 12 and sequentially doubled, that is, any one of 12, 24, 48, 96, . . . , and wherein n is such that, if the bit length n is 7, 9, 11, 13, . . . , the number N is 12, 24, 48, 96, . . . , respectively, said method comprising the steps of: converting, by an N-ary modulation system, three bits of the binary signal, out of said n bits, into two digits of ternary signals; and mapping said two digits of ternary signals with axial symmetry to said first and second phase planes, respectively. 4. The N-ary modulation method according to claim 2, further comprising the steps of: allocating two bits of said n bits for identifying four quadrants of said first phase plane; and allocating two bits of the remaining (n-2) bits for identifying four quadrants of said second phase plane. 5. An N-ary modulation method comprising the step of associating a binary signal, a bit length thereof being n, with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 5 and sequentially doubled, that is, any one of 5, 10, 20, 40, 80, . . . , and wherein n is such that, if the bit length n is 9, 13, 17, 21, 25, . . . , the number N is 5, 10, 20, 40, 80, . . . , respectively, said method further comprising the step of associating, by an N-ary modulation system, in allocating nine bits, out of said n bits, of said binary signal to four digits of 5-ary signals, said nine-bit binary signal with said four digits of 5-ary signals so as to substantially minimize the average error rate of respective bits of nine-bit binary signal against all errors with the Lee distance of 1 of said four digits of 5-ary signals. 6. An N-ary modulation method in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second, third and fourth phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 20 and sequentially doubled, that is, any one of 20, 40, 80, 160, . . . , and wherein n is such that, if the bit length n is 17, 21, 25, 29, . . . , the number N is 20, 40, 80, 160, . . . , respectively, said method comprising the steps of: converting, by an N-ary modulation system, nine bits of the binary signal, out of said n bits, into four digits of 5-ary signals; and mapping said four digits of 5-ary signals with rotational symmetry of 90° to said first to fourth phase planes respectively. 7. An N-ary modulation method in which a binary signal, a bit length thereof being n, is associated with N-ary signals with first, second, third and fourth phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 20 and sequentially doubled, that is, any one of 20, 40, 80, 160, . . . , and wherein n is such that, if the bit length n is 17, 21, 25, 29, . . . ,the number N is 20, 40, 80, 160, . . . , respectively, said method comprising the steps of: converting, by an N-ary modulation system, nine bits of the binary signal, out of said n bits, into four digits of 5-ary signals; and mapping said four digits of 5-ary signals with axial symmetry to said first to fourth phase planes respectively. 8. The N-ary modulation method according to claim 6, further comprising the steps of: allocating two of said n bits for identifying four quadrants of said first phase plane; allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane; and allocating two of the remaining (n-6) bits for identifying four quadrants of said fourth phase plane. 9. An N-ary modulation method comprising the step of associating a binary signal, a bit length thereof being n, with N-ary signals with first, second and third phase planes respectively, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 7 and sequentially doubled, that is, any one of 7, 14, 28, 56, 112, 224, . . . , and wherein n is such that, if the bit length n is 8, 11, 14, 17, 20, 23, . . . the number N is, 7, 14, 28, 56, 112, 224, . . . , respectively, said method comprising further the step of associating, by an N-ary modulation system, in allocating eight bits, out of said n bits, of said binary signal, to three digits of 7-ary signals, said eight-bit binary signal with said three digits of 7-ary signals, so as to substantially minimize the average error rate of respective bits of eight-bit binary signal against all errors with the Lee distance of 1 of said three digits of 7-ary signals. 10. An N-ary modulation method in which a binary signal, a bit length thereof being n, are transmitted as said signals with a length of n is associated with N-ary signals arranged in first, second and third phase planes respectively, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 28 and sequentially doubled, that is, any one of 28, 56, 112, 224, . . . , and wherein n is such that, if the bit length n is 14, 17, 20, 23, . . . , the number N is 28, 56, 112, 224, . . . , respectively, said method comprising the step of converting, by an N-ary modulation system, eight bits of the binary signal, out of said n bits, into three digits of 7-ary signals; and mapping said three digits of 7-ary signals with rotational symmetry of 90° to said first, second and third phase planes. 11. An N-ary modulation method in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second and third phase planes respectively, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 28 and sequentially doubled, that is, any one of 28, 56, 112, 224, . . . , and wherein n is such that, if the bit length n is 14, 17, 20, 23, . . . , the number N is 28, 56, 112, 224, . . . , respectively, said method comprising the steps of: converting, by an N-ary modulation system, eight bits of the binary signal, out of said n bits, into three digits of 7-ary signals; and mapping said three digits of 7-ary signals with axial symmetry to said first, second and third phase planes respectively. 12. The N-ary modulation method according to claim 10, further comprising the steps of: allocating two of said n bits for identifying four quadrants of said first phase plane; allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; and allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane. 13. An N-ary modulation method comprising the step of associating a binary signal, a bit length thereof being n, with N-ary signals arranged in first, second and third phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 11 and sequentially doubled, that is, any one of 11, 22, 44, 88, 176, 352, . . . , and wherein n is such that, if the bit length n is 10, 13, 16, 19, 22, 25, . . .,the number N is 11, 22, 44, 88, 176, 352, respectively, said method further comprising the step of associating, by an N-ary modulation system, in allocating ten bits, out of said n bits, of said binary signal to three digits of 11-ary signals, said ten-bit binary signal with said three digits of 11-ary signals so as to substantially minimize the average error rate of respective bits often-bit binary signal against all errors with the Lee distance of 1 of said three digits of 11-ary signals. 14. An N-ary modulation method in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second and third phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 44 and sequentially doubled, that is, any one of 44, 88, 176, 352, . . . , and wherein n is such that, if the bit length n is 16, 19, 22, 25, . . . , the number N is 44, 88, 176, 352, . . . , respectively, said method comprising the steps of: converting, by an N-ary modulation system, ten bits of the binary signal, out of said n bits, into three digits of 11-ary signals; and mapping said three digits of 11-ary signals with rotational symmetry of 90° to said first, second and third phase planes respectively. 15. An N-ary modulation method in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second and third phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 44 and sequentially doubled, that is, any one of 44, 88, 176, 352, . . . , and wherein n is such that, if the bit length n is 16, 19, 22, 25, . . . , the numberN is 44, 88, 176, 352, . . . , respectively, said method comprising the steps of: converting, by an N-ary modulation system, ten bits of the binary signal, out of said n bits, into three digits of 11-ary signals; and mapping said three digits of 11-ary signals with axial symmetry to said first, second and third phase planes. 16. The N-ary modulation method according to claim 14, further comprising the steps of: allocating two of said n bits for identifying four quadrants of said first phase plane; allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; and allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane. 17. An N-ary modulation method comprising the step of associating a binary signal, a bit length thereof being n, with N-ary signals arranged in first, second, third and fourth phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 15 and sequentially doubled, that is, any one of 15, 30, 60, 120, 240, 480, . . . , and wherein n is such that, if the bit length n is 15, 19, 23, 27, 31, 35, . . . , the number N is 15, 30, 60, 120, 240, 480, respectively, said method further comprising the step of associating, by an N-ary modulation system, in allocating 15 bits, out of said n bits, of said binary signal to four digits of 15-ary signals, said 15-bit binary signal with said four digits of 15-ary signals, so as to substantially minimize the average error rate of respective bits of 15-bit binary signal against all errors with the Lee distance of 1 of said four digits of 15-ary signals. 18. An N-ary modulation method in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second, third and fourth phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 60 and sequentially doubled, that is, any one of 60, 240, 480, . . . , and wherein n is such that, if the bit length n is 23, 27, 31, 35, the number N is 60, 120, 240, 480, . . . , respectively, said method comprising the steps of: converting, by an N-ary modulation system, 15 bits of the binary signal, out of said n bits, into four digits of 15-ary signals; and mapping said four digits of 15-ary signals with rotational symmetry of 90° to said first to fourth phase planes respectively. 19. An N-ary modulation method in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second, third and fourth phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 60 and sequentially doubled, that is, any one of 60, 120, 240, 480, . . . , and wherein n is such that, if the bit length n is 23, 27, 31, 35, the number N is 60, 120, 240, 480, . . . , respectively, said method comprising the steps of: converting, by an N-ary modulation system, 15 bits of the binary signal, out of said n bits, into four digits of 15-ary signals; and mapping said four digits of 15-ary signals with axial symmetry to said first, second and third phase planes respectively. 20. The N-ary modulation method according to claim 18, further comprising the steps of: allocating two of said n bits for identifying four quadrants of said first phase plane; allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane; and allocating two of the remaining (n-6) bits for identifying four quadrants of said fourth phase plane. 21. The N-ary modulation method according to claim 1, wherein, in associating three-bit binary signal with two digits of ternary signals, said ternary signals being arranged in four quadrants of each of two phase planes, the three-bit binary signal of (0,0,0), (0,0,1), (0,1,1), (1,1,0), (1,1,1), (0,1,0), (1,0,0) and (1,0,1) are allocated to two digits of ternary signals of(0,0), (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1) respectively. 22. The N-ary modulation method according to claim 1, wherein, in place of said three-bit binary signal of (0,0,0), (0,0,1), (0,1,1), (1,1,0), (1,1,1), (0,1,0), (1,0,0) and (1,0,1), the bits of (0,0,0), (0,0,1), (0,1,0), (1,1,0), (1,1,1), (0,1,1), (1,0,0) and (1,0,1), (0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (0,1,0) and (1,1,1) or (0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (1,1,0) and (0,1,0) are allocated. 23. The N-ary modulation method according to claim 1, wherein, in associating three-bit binary signal to two digits of ternary signals, said ternary signals being arranged in four quadrants of each of two phase planes, in allocating the three-bit binary signal to the two digits of ternary signals, that is, (0,0), (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1), the totality of the three-bit binary signal (b2, b1, b0) are added by (v2, v1, v0), where v2, v1 and v0are 0 or 1, to give (b2+v2, b1+v1, b0+v0), as three-bit binary signal, which are then allocated to the two digits of ternary signals, or wherein the bits b2, b1 and b0 are interchanged in the bit sequence and allocated in this sequence interchanged state to the two digits of ternary signals. 24. An N-ary modulation system comprising means for associating a binary signal, a bit length thereof being n, with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 3 and sequentially doubled, that is, any one of 3, 6, 12, 24, 48, 96, . . . , and wherein n is such that, if the bit length n is 3, 5, 7, 9, 11, 13, . . .,the number N is 3, 6, 12, 24, 48, 96, . . ., respectively, said system further comprising: converting means for allocating three-bits, out of said n bits, of said binary signal, to two digits of ternary signals; said converting means associating three-bit binary signal with two digits of ternary signals so as to substantially minimize the average error rate of respective bits of said three-bit binary signal against all errors with the Lee distance of 1 of said two digits of ternary signals respectively. 25. An N-ary modulation system in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 12 and sequentially doubled, that is, any one of 12, 24, 48, 96, . . . , and wherein n is such that, if the bit length n is 7, 9, 11, 13, . . . , the number N is 12, 24, 48, 96, . . . , respectively, said system comprising: means for converting three bits of the binary signal, out of said n bits, into two digits of ternary signals; and means for mapping said two digits of ternary signals with rotational symmetry of 90° to said first and second phase planes respectively. 26. An N-ary modulation system in which a binary signal, a bit length thereof being n, are transmitted as said signals with the length of n are associated, as N-ary signals, with first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 12 and sequentially doubled, that is, any one of 12, 24, 48, 96, . . . , and wherein n is such that, if the bit length n is 7, 9, 11, 13, . . . , the number N is 12, 24, 48, 96, . . . , respectively, said system comprising: means for converting three bits of the binary signal, out of said n bits, into two digits of ternary signals; and means for mapping said two digits of ternary signals with axial symmetry to said first and second phase planes respectively. 27. The N-ary modulation system according to claim 25, further comprising: means for allocating two of said n bits for identifying four quadrants of said first phase plane; and means for allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane. 28. An N-ary modulation system in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 5 and sequentially doubled, that is, any one of 5, 10, 20, 40, 80, . . . , and wherein n is such that, if the bit length n is 9, 13, 17, 21, 25, . . . , the number N is 10, 20, 40, 80, . . . , respectively, said system comprising: converting means for allocating nine bits, out of said n bits, of said binary signal to four digits of 5-ary signals; said converting means associating said nine-bit binary signal with said four digits of 5-ary signals, so as to substantially minimize the average error rate of respective bits of nine-bit binary signal against all errors with the Lee distance of 1 of said four digits of 5-ary signals. 29. An N-ary modulation system in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second, third and fourth phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 20 and sequentially doubled, that is, any one of 20, 40, 80, 160, . . . , and wherein n is such that, if the bit length n is 17, 21, 25, 29, . . . , the number N is 20, 40, 80, 160, . . . , respectively, said system comprising: means for converting nine bits of the binary signal, out of said n bits, into four digits of 5-ary signals; and means for mapping said four digits of 5-ary signals with rotational symmetry of 90° to said first to fourth phase planes respectively. 30. An N-ary modulation system in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second, third and fourth phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 20 and sequentially doubled, that is, any one of 20, 40, 80, 160, . . . , and wherein n is such that, if the bit length n is 17, 21, 25, 29, . . . ,the number N is 20, 40, 80, 160, . . . , respectively, said system comprising: means for converting nine bits of the binary signal, out of said n bits, into four digits of 5-ary signals; and means for mapping said four digits of 5-ary signals with axial symmetry to said first to fourth phase planes respectively. 31. The N-ary modulation system according to claim 29, further comprising: means for allocating two of said n bits for identifying four quadrants of said first phase plane; means for allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; means for allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane; and means for allocating two of the remaining (n-6) bits for identifying four quadrants of said fourth phase plane. 32. An N-wy modulation system in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second and third phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 7 and sequentially doubled, that is, any one of 7, 14, 28, 56, 112, 224, . . . , and wherein n is such that, if the bit length n is 8, 11, 14, 17, 20, 23, . . . , the number N is, 7, 14, 28, 56, 112, 224, . . . , respectively, said system comprising: converting means for allocating eight bits, out of said n bits, of said binary signal to three digits of 7-ary signals; said converting means associating eight bits, out of said n bits, of said binary signal, to three digits of 7-ary signals so as to substantially minimize the average error rate of respective bits of eight-bit binary signal against all errors with the Lee distance of 1 of said three digits of 7-ary signals. 33. An N-ary modulation system in which a binary signal, a bit length thereof being n, are transmitted as said signals with the bit length of n are associated as N-ary signals with first, second and third phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 28 and sequentially doubled, that is, any one of 28, 56, 112, 224, . . . , and wherein n is such that, if the bit length n is 14, 17, 20, 23, . . . , the number N is 28, 56, 112, 224, . . . , respectively, said system comprising: means for converting eight bits of the binary signal, out of said n bits, into three digits of 7-ary signals; and means for mapping said three digits of 7-ary signals with rotational symmetry of 90° to said first, second and third phase planes. 34. An N-ary modulation system in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second and third phase planes respectively for transmission, wherein N is not a number belonging to powers of 2but is a number belonging to a series beginning from 28 and sequentially doubled, that is, any one of 28, 56, 112, 224, . . . , and wherein n is such that, if the bit length n is 14, 17, 20, 23, . . . , the number N is 28, 56, 112, 224, . . . , respectively, said system comprising: means for converting eight bits of the binary signal, out of said n bits, into three digits of 7-ary signals; and means for mapping said three digits of 7-ary signals with axial symmetry to said first, second and third phase planes respectively. 35. The N-ary modulation system according to claim 33, further comprising: means for allocating two of said n bits for identifying four quadrants of said first phase plane; means for allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; and means for allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane. 36. An N-ary modulation system in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second and third phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 11 and sequentially doubled, that is, any one of 11, 22, 44, 88, 176, 352, . . . , and wherein n is such that, if the bit length n is 10, 13, 16, 19, 22, 25, . . . , the number N is 11, 22, 44, 88, 176, 352, . . . , respectively, said system comprising: converting means for allocating ten bits, out of said n bits, of said binary signal to three digits of 11-ary signals; said converting means associating ten bits, out of said n bits, of said binary signal to three digits of 11-ary signals, with said three digits of 11-ary signals so as to substantially minimize the average error rate of respective bits of ten-bit binary signal against all errors with the Lee distance of 1 of said three digits of 11-ary signals. 37. An N-ary modulation system in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second and third phase planes respectively for transmission, wherein N is not a number belonging to powers of 2but is a number belonging to a series beginning from 44 and sequentially doubled, that is, any one of 44, 88, 176, 352, . . . , and wherein n is such that, if the bit length n is 16, 19, 22, 25, . . . , the number N is 44, 88, 176, 352, . . . , respectively, said system comprising: means for converting ten bits of the binary signal, out of said n bits, into three digits of 11-ary signals; and means for mapping said three digits of 11-ary signals with 90° rotational symmetry of 90° to said first, second and third phase planes respectively. 38. An N-ary modulation system in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second and third phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 44 and sequentially doubled, that is, any one of 44, 88, 176, 352, . . . , and wherein n is such that, if the bit length n is 16, 19, 22, 25, . . . , the number N is 44, 88, 176, 352, . . . , respectively, said system comprising: means for converting ten bits of the binary signal, out of said n bits, into three digits of 11-ary signals; and means for mapping said three digits of 11-ary signals with axial symmetry to said first, second and third phase planes respectively. 39. The N-ary modulation system according to claim 37, further comprising: means for allocating two of said n bits for identifying four quadrants of said first phase plane; means for allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; and means for allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane. 40. An N-ary modulation system comprising means for associating a binary signal, a bit length thereof being n, with N-ary signals arranged in first, second, third and fourth phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 15 and sequentially doubled, that is, any one of 15, 30, 60, 120, 240, 480, . . . , and wherein n is such that, if the bit length n is 15, 19, 23, 27, 31, 35, . . . ,the number N is 15, 30, 60, 120, 240, 480, . . . , respectively, said system further comprising: converting means for allocating 15 bits, out of said n bits, of said binary signal to four digits of 15-ary signals; said converting means associating the 15 bits, out of said n bits, of said binary signal to four digits of 15-ary signals, so as to substantially minimize the average error rate of respective bits of 15-bit binary signal against all errors with the Lee distance of 1 of said four digits of 15-ary signals. 41. An N-ary modulation system in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second, third and fourth phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 60 and sequentially doubled, that is, any one of 60, 120, 240, 480, . . . , and wherein n is such that, if the bit length n is 23, 27, 31, 35, . . . , the number N is 60, 120, 240, 480, . . . , respectively, said system comprising: means for converting 15 bits of the binary signal, out of said n bits, into four digits of 15-ary signals; and means for mapping said four digits of 15-ary signals with 90° rotational symmetry to said first to fourth phase planes. 42. An N-ary modulation system in which a binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first, second, third and fourth phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 60 and sequentially doubled, that is, any one of 60, 120, 240, 480, . . . , and wherein n is such that, if the bit length n is 23, 27, 31, 35, . . . , the number N is 60, 120, 240, 480, . . . , respectively, said system comprising: means for converting 15 bits of the binary signal, out of said n bits, into four digits of 15-ary signals; and means for mapping said four digits of 15-ary signals with axial symmetry to said first, second and third phase planes. 43. The N-ary modulation system according to claim 41, further comprising: means for allocating two of said n bits for identifying four quadrants of said first phase plane; means for allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; means for allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane; and means for allocating two of the remaining (n-6) bits for identifying four quadrants of said fourth phase plane. 44. The N-ary modulation system according to claim 24, wherein, in associating three-bit binary signal to two digits of ternary signals, arranged in four quadrants of each of two phase planes, the three-bit binary signal of (0,0,0), (0,0,1), (0,1,1), (1,1,0), (1,1,1), (0,1,0), (1,0,0) and (1,0,1) are allocated to two digits of ternary signals of(0,0), (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1). 45. The N-ary modulation system according to claim 24, wherein, in place of said three-bit binary signal of (0,0,0), (0,0,1), (0,1,1), (1,1,0), (1,1,1), (0,1,0), (1,0,0) and (1,0,1), the bits of (0,0,0), (0,0,1), (0,1,0), (1,1,0), (1,1,1), (0,1,1), (1,0,0) and (1,0,1), (0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (0,1,0) and (1,1,1) or (0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (1,1,0) and (0,1,0) are allocated. 46. The N-ary modulation system according to claim 24, wherein, in associating three-bit binary signal to two digits of ternary signals, arranged in four quadrants of each of two phase planes, more specifically, in allocating the three-bit binary signal to the two digits of ternary signals, that is, (0,0), (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1), the totality of the three-bit binary signal (b2, b1, b0) are added by (v2, v1, v0), where v2, v1 and v0 are 0 or 1, to give (b2+v2, b1+v1, b0+v0), as three-bit binary signal, which are then allocated to the two digits of ternary signals, or wherein the bits b2, b1 and b0 are interchanged in the bit sequence and allocated in this sequence interchanged state to the two digits of ternary signals. 47. A modulation method comprising the steps of: inputting a three-bit binary signal, forming at least a portion of a bit string of input digital signals; converting, said three-bit binary signal into two digits of ternary signals; arranging said two digits of ternary signals in the quadrants of each of two phase planes; mapping said two digits of ternary signals with rotational symmetry therein; and allocating the three-bit binary signal and the two digits of ternary signals such as to minimize the average error rate of respective bits of the three-bit binary signal against all errors with the distance 1 of said ternary signals. 48. A modulation method comprising the steps of: inputting a three-bit binary signal, forming at least a portion of a bit string of input digital signals; converting, said three-bit binary signal into two digits of ternary signals; arranging said two digits of ternary signals in the quadrants of each of two phase planes; mapping said two digits of ternary signals with axial symmetry therein; and allocating the three-bit binary signal and the two digits of ternary signals such as to minimize the average error rate of respective bits of the three-bit binary signal against all errors with the distance 1 of said ternary signals. 49. A modulation apparatus comprising: a conversion circuit receiving a three-bit binary signal, forming at least a portion of a bit string of input digital signals, and converting said three-bit binary signal into two digits of ternary signals; an arranging circuit arranging said two digits of ternary signals in the quadrants of each of two phase planes and mapping said two digits of ternary signals with rotational symmetry therein; and an allocating circuit allocating the three-bit binary signal and the two digits of ternary signals such as to minimize the average error rate of respective bits of the three-bit binary signal against all errors with the distance 1 of said ternary signals. 50. A modulation apparatus comprising: a converting circuit receiving a three-bit binary signal, forming at least a portion of a bit string of input digital signals, and converting said three-bit binary signal into two digits of ternary signals; an arranging circuit arranging said two digits of ternary signals in the quadrants of each of two phase planes and mapping said two digits of ternary signals with axial symmetry therein; and an allocating circuit allocating the three-bit binary signal and the two digits of ternary signals such as to minimize the average error rate of respective bits of the three-bit binary signal against all errors with the distance 1 of said ternary signals. 51. A demodulation apparatus receiving modulated signals from a modulation apparatus as defined in claim 49 over a transmission channel to demodulate and output received signals. 52. The N-ary modulation method according to claim 3, further comprising the steps of: allocating two bits of said n bits for identifying four quadrants of said first phase plane; and allocating two bits of the remaining (n-2) bits for identifying four quadrants of said second phase plane. 53. The N-ary modulation method according to claim 7, further comprising the steps of: allocating two of said n bits for identifying four quadrants of said first phase plane; allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane; and allocating two of the remaining (n-6) bits for identifying four quadrants of said fourth phase plane. 54. The N-ary modulation method according to claim 11, further comprising the steps of: allocating two of said n bits for identifying four quadrants of said first phase plane; allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; and allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane. 55. The N-ary modulation method according to claim 15, further comprising the steps of: allocating two of said n bits for identifying four quadrants of said first phase plane; allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; and allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane. 56. The N-ary modulation method according to claim 19, further comprising the steps of: allocating two of said n bits for identifying four quadrants of said first phase plane; allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane; and allocating two of the remaining (n-6) bits for identifying four quadrants of said fourth phase plane. 57. The N-ary modulation system according to claim 26, further comprising: means for allocating two of said n bits for identifying four quadrants of said first phase plane; and means for allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane. 58. The N-ary modulation system according to claim 30, further comprising: means for allocating two of said n bits for identifying four quadrants of said first phase plane; means for allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; means for allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane; and means for allocating two of the remaining (n-6) bits for identifying four quadrants of said fourth phase plane. 59. The N-ary modulation system according to claim 34, further comprising: means for allocating two of said n bits for identifying four quadrants of said first phase plane; means for allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; and means for allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane. 60. The N-ary modulation system according to claim 38, further comprising: means for allocating two of said n bits for identifying four quadrants of said first phase plane; means for allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; and means for allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane. 61. The N-ary modulation system according to claim 42, further comprising: means for allocating two of said n bits for identifying four quadrants of said first phase plane; means for allocating two of the remaining (n-2) bits for identifying four quadrants of said second phase plane; means for allocating two of the remaining (n-4) bits for identifying four quadrants of said third phase plane; and means for allocating two of the remaining (n-6) bits for identifying four quadrants of said fourth phase plane.