IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
UP-0926552
(2007-10-29)
|
등록번호 |
US-7642598
(2010-02-11)
|
우선권정보 |
JP-10-251635(1998-09-04) |
발명자
/ 주소 |
- Yamazaki, Shunpei
- Ohtani, Hisashi
|
출원인 / 주소 |
- Semiconductor Energy Laboratory Co., Ltd.
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
27 인용 특허 :
154 |
초록
▼
A semiconductor device with high reliability is provided using an SOI substrate. When the SOI substrate is fabricated by using a technique typified by SIMOX, ELTRAN, or Smart-Cut, a single crystal semiconductor substrate having a main surface (crystal face) of a {110} plane is used. In such an SOI s
A semiconductor device with high reliability is provided using an SOI substrate. When the SOI substrate is fabricated by using a technique typified by SIMOX, ELTRAN, or Smart-Cut, a single crystal semiconductor substrate having a main surface (crystal face) of a {110} plane is used. In such an SOI substrate, adhesion between a buried insulating layer as an under layer and a single crystal silicon layer is high, and it becomes possible to realize a semiconductor device with high reliability.
대표청구항
▼
What is claimed is: 1. An electronic equipment comprising: an island-like single crystalline semiconductor layer comprising silicon formed by removing portions of a single crystal silicon layer on an insulating layer comprising silicon oxide over a silicon substrate, the island-like single crystall
What is claimed is: 1. An electronic equipment comprising: an island-like single crystalline semiconductor layer comprising silicon formed by removing portions of a single crystal silicon layer on an insulating layer comprising silicon oxide over a silicon substrate, the island-like single crystalline semiconductor layer having at least a channel formation region and source and drain regions; a gate insulating film formed on the channel formation region; a gate wiring line formed over the channel formation region with the gate insulating film interposed therebetween, wherein the gate wiring line includes a metal layer which contacts the gate insulating film; etching stoppers formed on side surfaces of the gate wiring line; side walls comprising silicon nitride formed adjacent to the side surfaces of the gate wiring line with the etching stoppers interposed therebetween, wherein silicon oxide is interposed between the island-like single crystalline semiconductor layer and the side walls; and an insulating film comprising silicon nitride formed over the island-like single crystalline semiconductor layer and the gate wiring line, wherein the island-like single crystalline semiconductor layer is 20 to 100 nm thick. 2. The electronic equipment according to claim 1 wherein the source and drain regions are in contact with the insulating layer. 3. The electronic equipment according to claim 1 further comprising a first LDD region between the channel formation region and the drain region and a second LDD region between the channel formation region and the source region, wherein the first and second LDD regions are in contact with the insulating layer. 4. An electronic equipment comprising: an island-like single crystalline semiconductor layer comprising silicon formed by removing portions of a single crystal silicon layer on an insulating layer comprising silicon oxide over a silicon substrate, the island-like single crystalline semiconductor layer having at least a channel formation region and source and drain regions; a gate insulating film formed on the channel formation region; a gate wiring line comprising polysilicon formed over the channel formation region with the gate insulating film interposed therebetween; silicon oxide films formed on side surfaces of the gate wiring line; side walls comprising silicon nitride formed adjacent to the side surfaces of the gate wiring line with the silicon oxide films interposed therebetween, wherein silicon oxide is interposed between the island-like single crystalline semiconductor layer and the side walls; and an insulating film comprising silicon nitride formed over the island-like single crystalline semiconductor layer and the gate wiring line, wherein an upper surface of the gate wiring line and at least a part of the source and drain regions comprise a metal silicide, and wherein the island-like single crystalline semiconductor layer is 20 to 100 nm thick. 5. The electronic equipment according to claim 4 wherein the electronic equipment is a portable information terminal. 6. The electronic equipment according to claim 4 wherein the electronic equipment is a portable computer. 7. The electronic equipment according to claim 4 wherein the electronic equipment is a cellular phone. 8. The electronic equipment according to claim 4 wherein the metal silicide is cobalt silicide. 9. The electronic equipment according to claim 4 wherein the island-like single crystalline semiconductor layer is hydrogenated. 10. The electronic equipment according to claim 4 wherein the source and drain regions are in contact with the insulating layer. 11. An electronic equipment comprising: an island-like single crystalline semiconductor layer comprising silicon formed by removing portions of a single crystal silicon layer on an insulating layer comprising silicon oxide over a silicon substrate, the island-like single crystalline semiconductor layer having at least a channel formation region and source and drain regions; a gate insulating film formed on the channel formation region; a gate wiring line formed over the channel formation region with the gate insulating film interposed therebetween, wherein the gate wiring line includes a metal layer which contacts the gate insulating film; etching stoppers formed on side surfaces of the gate wiring line; side walls comprising silicon nitride formed adjacent to the side surfaces of the gate wiring line with the etching stoppers interposed therebetween, wherein silicon oxide is interposed between the island-like single crystalline semiconductor layer and the side walls; and an insulating film comprising silicon nitride oxide formed over the island-like single crystalline semiconductor layer and the gate wiring line, wherein the island-like single crystalline semiconductor layer is 20 to 100 nm thick. 12. An electronic equipment comprising: an island-like single crystalline semiconductor layer comprising silicon formed by removing portions of a single crystal silicon layer on an insulating layer comprising silicon oxide over a silicon substrate, the island-like single crystalline semiconductor layer having at least a channel formation region and source and drain regions; a gate insulating film formed on the channel formation region; a gate wiring line comprising poly silicon formed over the channel formation region with the gate insulating film interposed therebetween; silicon oxide films formed on side surfaces of the gate wiring line; side walls comprising silicon nitride formed adjacent to the side surfaces of the gate wiring line with the silicon oxide films interposed therebetween, wherein silicon oxide is interposed between the island-like single crystalline semiconductor layer and the side walls; and an insulating film comprising silicon nitride oxide formed over the island-like single crystalline semiconductor layer and the gate wiring line, wherein an upper surface of the gate wiring line and at least a part of the source and drain regions comprise a metal silicide, and wherein the island-like single crystalline semiconductor layer is 20 to 100 nm thick. 13. An electronic equipment comprising: an island-like single crystalline semiconductor layer comprising silicon formed by removing portions of a single crystal silicon layer on an insulating layer comprising silicon oxide over a silicon substrate, the island-like single crystalline semiconductor layer having at least a channel formation region and source and drain regions; a gate insulating film formed on the channel formation region; a gate wiring line formed over the channel formation region with the gate insulating film interposed therebetween; silicon oxide films formed on side surfaces of the gate wiring line; side walls comprising silicon nitride formed adjacent to the side surfaces of the gate wiring line with the silicon oxide films interposed therebetween; a first insulating film comprising silicon nitride formed over the island-like single crystalline semiconductor layer and the gate wiring line; a second insulating film formed over the first insulating film wherein the second insulating film is a flattening film; a wiring line formed over the second insulating film and electrically connected to one of the source and drain regions; and a third insulating film formed over the second wiring line and the second insulating film wherein the third insulating film is a flattening film, wherein the island-like single crystalline semiconductor layer is 20 to 100 nm thick. 14. The electronic equipment according to claim 13 wherein the gate wiring line includes a metal layer which contacts the gate insulating film. 15. The electronic equipment according to claim 14 wherein the gate wiring line comprises tantalum or a tantalum nitride. 16. The electronic equipment according to claim 13 wherein the first insulating film comprises silicon nitride. 17. The electronic equipment according to claim 13 wherein the second and third flattening insulating films comprise a resin. 18. The electronic equipment according to claim 13 wherein an upper surface of the gate wiring line and at least a part of the source and drain regions comprise a metal silicide. 19. The electronic equipment according to claim 18 wherein the metal silicide is cobalt silicide. 20. The electronic equipment according to claim 13 wherein the electronic equipment is a portable computer. 21. The electronic equipment according to claim 13 wherein the electronic equipment is a cellular phone. 22. An electronic equipment comprising: a CMOS circuit including an N-channel transistor and a P-channel transistor, each of the N-channel transistor and the P-channel transistor comprising: an island-like single crystalline semiconductor layer comprising silicon formed by removing portions of a single crystal silicon layer on an insulating layer comprising silicon oxide over a silicon substrate, the island-like single crystalline semiconductor layer including at least a channel formation region, a source region and a drain region, a gate insulating film formed on the channel formation region, a gate wiring line formed over the channel formation region with the gate insulating film interposed therebetween, silicon oxide films formed on side surfaces of the gate wiring line, and side walls comprising silicon nitride formed adjacent to the side surfaces of the gate wiring line with the silicon oxide films interposed therebetween, wherein silicon oxide is interposed between the island-like single crystalline semiconductor layer and the side walls; and an interlayer insulating film comprising silicon nitride formed over the island-like single crystalline semiconductor layer and the gate wiring line, wherein the island-like single crystalline semiconductor layer of the N-channel transistor and the island-like single crystalline semiconductor layer of the P-channel transistor are separately located, and wherein the island-like single crystalline semiconductor layer of the N-channel transistor and the island-like single crystalline semiconductor layer of the P-channel transistor are 20 to 100 nm thick. 23. An electronic equipment comprising: a transistor including: an island-like single crystalline semiconductor layer comprising silicon formed by removing portions of a single crystal silicon layer on an insulating layer comprising silicon oxide over a silicon substrate, the island-like single crystalline semiconductor layer including at least two channel formation regions, a source region and a drain region, a gate insulating film formed on the two channel formation regions, at least two gate wiring lines formed over the two channel formation regions with the gate insulating film interposed therebetween, silicon oxide films formed on side surfaces of the two gate wiring lines, and side walls comprising silicon nitride formed adjacent to the side surfaces of the two gate wiring lines with the silicon oxide films therebetween, wherein silicon oxide is interposed between the island-like single crystalline semiconductor layer and the side walls; and an interlayer insulating film comprising silicon nitride formed over the island-like single crystalline semiconductor layer and the two gate wiring lines, wherein the island-like single crystalline semiconductor layer is 20 to 100 nm thick. 24. An electronic equipment comprising: a CMOS circuit including an N-channel transistor and a P-channel transistor, each of the N-channel transistor and the P-channel transistor comprising: an island-like single crystalline semiconductor layer comprising silicon formed by removing portions of a single crystal silicon layer on an insulating layer comprising silicon oxide over a silicon substrate, the island-like single crystalline semiconductor layer including at least a channel formation region, a source region and a drain region, wherein upper surfaces of the source region and the drain region comprise a metal silicide, a gate insulating film formed on the channel formation region, a gate wiring line formed over the channel formation region with the gate insulating film interposed therebetween, wherein the gate wiring line comprises polysilicon and an upper surface of the gate wiring line comprises a metal silicide, silicon oxide films formed on side surfaces of the gate wiring line, and side walls comprising silicon nitride formed adjacent to the side surfaces of the gate wiring line with the silicon oxide films interposed therebetween, wherein silicon oxide is interposed between the island-like single crystalline semiconductor layer and the side walls; and an interlayer insulating film comprising silicon nitride in contact with at least the metal silicide of the gate wiring line and the side walls, wherein the island-like single crystalline semiconductor layer of the N-channel transistor and the island-like single crystalline semiconductor layer of the P-channel transistor are separately located, and wherein the island-like single crystalline semiconductor layer of the N-channel transistor and the island-like single crystalline semiconductor layer of the P-channel transistor are 20 to 100 nm thick. 25. An electronic equipment comprising: a transistor including: an island-like single crystalline semiconductor layer comprising silicon formed by removing portions of a single crystal silicon layer on an insulating layer comprising silicon oxide over a silicon substrate, the island-like single crystalline semiconductor layer including at least two channel formation regions, a source region and a drain region wherein upper surfaces of the source region and the drain region comprise a metal silicide, a gate insulating film formed on the two channel formation regions, at least two gate wiring lines formed over the two channel formation regions with the gate insulating film interposed therebetween, wherein each of the two gate wiring lines comprises polysilicon and upper surfaces of the two gate wiring lines comprise a metal silicide, silicon oxide films formed on side surfaces of the two gate wiring lines, and side walls comprising silicon nitride formed adjacent to the side surfaces of the two gate wiring lines with the silicon oxide films therebetween wherein silicon oxide is interposed between the island-like single crystalline semiconductor layer and the side walls; and an interlayer insulating film comprising silicon nitride in contact with at least the metal suicide of the two gate wiring lines and the side walls, wherein the island-like single crystalline semiconductor layer is 20 to 100 nm thick. 26. An electronic equipment comprising: a CMOS circuit including an N-channel transistor and a P-channel transistor, each of the N-channel transistor and the P-channel transistor comprising: an island-like single crystalline semiconductor layer comprising silicon formed by removing portions of a single crystal silicon layer on an insulating layer comprising silicon oxide over a silicon substrate, the island-like single crystalline semiconductor layer including at least a channel formation region, a source region and a drain region, wherein upper surfaces of the source region and the drain region comprise a metal silicide, a gate insulating film formed on the channel formation region, a gate wiring line formed over the channel formation region with the gate insulating film interposed therebetween, wherein the gate wiring line comprises polysilicon and an upper surface of the gate wiring line comprises a metal silicide, silicon oxide films formed on side surfaces of the gate wiring line, and side walls comprising silicon nitride formed adjacent to the side surfaces of the gate wiring line with the silicon oxide films interposed therebetween, wherein silicon oxide is interposed between the island-like single crystalline semiconductor layer and the side walls; an interlayer insulating film comprising silicon nitride formed over the N-channel transistor and the P-channel transistor; a first wiring line formed over the interlayer insulating film, wherein the first wiring line is in contact with one of the source region and the drain region of the N-channel transistor through a contact hole of the interlayer insulating film; and a second wiring line formed over the interlayer insulating film wherein the second wiring line is in contact with one of the source region and the drain region of the P-channel transistor through a contact hole of the interlayer insulating film, wherein the island-like single crystalline semiconductor layer of the N-channel transistor and the island-like single crystalline semiconductor layer of the P-channel transistor are separately located, and wherein the island-like single crystalline semiconductor layer of the N-channel transistor and the island-like single crystalline semiconductor layer of the P-channel transistor are 20 to 100 nm thick. 27. An electronic equipment comprising: a transistor including: an island-like single crystalline semiconductor layer comprising silicon formed on an insulating layer comprising silicon oxide over a silicon substrate, the island-like single crystalline semiconductor layer including at least two channel formation regions, a source region and a drain region wherein upper surfaces of the source region and the drain region comprise a metal silicide, a gate insulating film formed on the island-like single crystalline semiconductor layer, at least two gate wiring lines formed over the two channel formation regions with the gate insulating film interposed therebetween, wherein each of the two gate wiring lines comprises polysilicon and upper surfaces of the two gate wiring lines comprise a metal silicide, silicon oxide films formed on side surfaces of the two gate wiring lines, and side walls comprising silicon nitride formed adjacent to the side surfaces of the two gate wiring lines with the silicon oxide films therebetween wherein silicon oxide is interposed between the island-like single crystalline semiconductor layer and the side walls; an interlayer insulating film comprising silicon nitride formed over the transistor; and a wiring line formed over the interlayer insulating film and being in contact with one of the source region and the drain region through a contact hole of the interlayer insulating film, wherein the island-like single crystalline semiconductor layer is 20 to 100 nm thick. 28. The electronic equipment according to any one of claims 1, 4, 11, 12, 13 and 22-27 wherein the island-like single crystalline semiconductor layer has a main surface of a {110} plane. 29. The electronic equipment according to any one of claims 1, 11, 12, 13 and 22-27 wherein the island-like single crystalline semiconductor layer is hydrogenated. 30. The electronic equipment according to any one of claims 1, 4, 11, 12, 13 and 22-27 wherein the electronic equipment is an information terminal. 31. The electronic equipment according to any one of claims 1, 4, 11, 12, 13 and 22-27 wherein the electronic equipment is a TV. 32. The electronic equipment according to any one of claims 1, 4, 11, 12, 13 and 22-27 wherein the island-like single crystalline semiconductor layer contains oxygen and a concentration of the oxygen is less than 2×1018 atoms/cm3. 33. The electronic equipment according to any one of claims 1, 4, 11, 12, 13, 22-27 wherein the insulating layer comprising silicon oxide includes a first silicon oxide layer and a second silicon oxide layer, the first silicon oxide layer being in contact with the silicon substrate and the second silicon oxide layer being in contact with the island-like single crystalline semiconductor layer. 34. The electronic equipment according to any one of claims 1, 4, 11, 12, 13 and 22-27 wherein the single crystalline semiconductor layer comprises part of a single crystalline silicon substrate different from the silicon substrate.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.