[특허]Compact apparatus and method for storing and loading semiconductor wafer carriers

[미국특허] Compact apparatus and method for storing and loading semiconductor wafer carriers 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	B65G-065/00
출원번호	UP-0764735 (2007-06-18)
등록번호	US-7682123 (2010-04-21)
발명자 / 주소	Bachrach, Robert Z.
출원인 / 주소	Applied Materials, Inc.
대리인 / 주소	Dugan & Dugan, PC
인용정보	피인용 횟수 : 2 인용 특허 : 52

초록 ▼

An improved apparatus and method is provided for storing semiconductor wafer carriers, and for loading wafers or wafer carriers to a fabrication tool. The apparatus preferably provides an elevated port for receipt of wafer carriers from an overhead factory transport, allows for local interconnection among a plurality of the inventive apparatuses, and enables independent loading of the factory load port and the tool load port. An inventive wafer handling method which divides a lot of wafers into sublots and distributes the sublots among tools configured to perform the same process is also provided.

대표청구항 ▼

What is claimed is: 1. A method of providing wafers to a fabrication tool having a load port coupled thereto for transferring one or more wafers from a wafer carrier to the fabrication tool, comprising: unloading a wafer carrier from an overhead wafer carrier transport system via a transfer mechanism including a vertical transfer mechanism and a horizontal transfer mechanism; lowering the wafer carrier from an upper elevation position of the transfer mechanism at the overhead wafer carrier transport system with the vertical transfer mechanism; placing the wafer carrier at a storage location via motion of the horizontal transfer mechanism; lowering the wafer carrier from the storage location with the vertical transfer mechanism to the load port located at an elevation below the storage location and positioned at a lower elevation position of the vertical transfer mechanism; placing the wafer carrier on the load port; opening the wafer carrier; and extracting horizontally at least one wafer from the wafer carrier into a loadlock operatively coupled to the load port via a loader mechanism. 2. The method of claim 1 further comprising: placing the wafer carrier in storage after unloading from the overhead wafer carrier transport system, and before placing the wafer carrier on the load port. 3. The method of claim 1, wherein the steps of unloading and lowering the wafer carrier comprise: employing the transfer mechanism to unload the wafer carrier from the overhead wafer carrier transport system and lower the wafer carrier directly from the overhead wafer carrier transport system to the load port. 4. A system comprising: a fabrication tool comprising a processing chamber for performing a process on at least one wafer; an overhead wafer carrier transport system; a storage location located at an elevation below the overhead wafer carrier transport system; a load port located at an elevation below the storage location; a transfer mechanism including a vertical transfer mechanism and an horizontal transfer mechanism, the transfer mechanism extending between the overhead wafer carrier transport system positioned at an upper elevation position of the vertical transfer mechanism and the load port positioned at a lower elevation position of the vertical transfer mechanism so that the transfer mechanism is adapted to access, and transfer a wafer carrier between, the overhead wafer carrier transport system, the storage location, and the load port; a loadlock operatively coupled to the load port; and a loader mechanism adapted to horizontally extract at least one wafer from the wafer carrier into the loadlock. 5. The system of claim 4 further comprising a storage location located between the overhead wafer carrier transport system and the load port, such that the transfer mechanism may transfer a wafer carrier thereamong. 6. The system of claim 4, wherein the transfer mechanism is adapted to transfer a wafer carrier directly between the overhead wafer carrier transport system and the load port. 7. An apparatus for supplying at least one wafer to a fabrication tool, comprising: a load port coupled to a fabrication tool; an overhead load port comprising a location to which a wafer carrier is transported via an overhead wafer carrier transport system; a storage location located at an elevation above the elevation of the load port and below the overhead load port coupled to the fabrication tool; a transfer mechanism adapted to access, and transfer a wafer carrier between, the overhead load port, the storage location, and the load port, the transfer mechanism including a vertical transfer mechanism and a horizontal transfer mechanism and wherein the overhead load port is located at an upper elevation position of the vertical transfer mechanism and above the storage location and the load port is positioned at a lower elevation position of the vertical transfer mechanism; a loadlock operatively coupled to the load port; and a loader mechanism adapted to horizontally extract at least one wafer from the wafer carrier into the loadlock. 8. The apparatus of claim 7 wherein the overhead load port comprises a location along the overhead wafer carrier transport system. 9. The apparatus of claim 8, wherein the vertical transfer mechanism is adapted to transfer a wafer carrier directly between the overhead load port and the storage location.

이 특허에 인용된 특허 (52) 인용/피인용 타임라인 분석

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Bonora Anthony C. (Menlo Park CA) Oen Joshua T. (Newark CA), Direct loadlock interface.
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Hughes John L. (Rodeo CA) Shula Thomas E. (Palo Alto CA) Rodriguez Carlos E. (Redwood City CA), Dual track handling and processing system.
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Salzman Philip M. (San Jose CA), Enclosure for load lock interface.
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Bachrach Robert Z., Factory automation apparatus and method for handling, moving and storing semiconductor wafer carriers.
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Bonora Anthony C. (Menlo Park CA) Richardson Bruce A. (Pleasanton CA) Brain Michael D. (San Jose CA) Cortez Edward J. (San Jose CA) Huang Barney H. (Sunnyvale CA), Human guided mobile loader stocker.
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Marohl Dan A., Magnetically coupled wafer extraction platform.
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Krueger Gordon P. (San Jose CA), Micro-enviroment load lock.
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Asakawa Teruo (Yamanashi JPX), Stock unit for storing carriers.
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Horn George W. (Concord MA), Transport system for computer integrated manufacturing/storage and drive component therefor.
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이 특허를 인용한 특허 (2) 인용/피인용 타임라인 분석

Ellwanger, Harald, Storage configuration with predeterminable storage atmosphere.
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[미국특허] Compact apparatus and method for storing and loading semiconductor wafer carriers 원문보기

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[미국특허] Compact apparatus and method for storing and loading semiconductor wafer carriers 원문보기

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