[특허]Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package

[미국특허] Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H01L-023/02 H01L-021/00 H05K-005/00
출원번호	UP-0772776 (2007-07-02)
등록번호	US-7692279 (2010-05-20)
발명자 / 주소	Karnezos, Marcos Carson, Flynn Kim, Youngcheol
출원인 / 주소	Chippac, Inc.
인용정보	피인용 횟수 : 6 인용 특허 : 113

초록 ▼

A multipackage module has multiple die of various types and having various functions and, in some embodiments, the module includes a digital processor, an analog device, and memory. A first die, having a comparatively large footprint, is mounted onto first die attach region on a surface of a first package substrate. A second die, having a significantly smaller footprint, is mounted upon the surface of the first die, on a second die attach region toward one edge of the first die. The first die is electrically connected by wire bonds to conductive traces in the die-attach side of the substrate. The second die is electrically connected by wire bonds to the first package substrate, and may additionally be electrically connected by wire bonds to the first die.

대표청구항 ▼

What is claimed is: 1. A semiconductor package, comprising: a first package die mounted on a first package substrate, the active surface of the first package die facing away from the first package substrate and the first package die being electrically interconnected by wire bonds to conductive traces in the first package substrate, the active surface of the first package die comprising a spacer attach region and a second die attach region; a spacer mounted on the spacer attach region and a second package mounted on the spacer; a second die mounted on the second die attach region of the active surface of the first package die, wherein the second die attach region is outside the spacer attach region; and a second spacer mounted on the second die and the second package mounted on the second spacer. 2. The package of claim 1, further comprising a spacer mounted on the spacer attach region beside the spacer. 3. The package of claim 1 wherein the second die is electrically interconnected by wire bonds to conductive traces on the first package substrate. 4. The package of claim 3 wherein the second die is additionally electrically interconnected by wire bonds to pads on the first package die. 5. The package of claim 1 wherein the second die is electrically interconnected by wire bonds to pads on the first package die. 6. The package of claim 1 wherein the spacer attach region is situated near an edge of the first package die. 7. The package of claim 1 wherein the second die attach region is situated away from the center of the active side of the first package die. 8. The package of claim 1 wherein the second die attach region is situated near a corner of the active side of the first package die.

이 특허에 인용된 특허 (113) 인용/피인용 타임라인 분석

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[미국특허] Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package 원문보기

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[미국특허] Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package 원문보기

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