최소 단어 이상 선택하여야 합니다.
최대 10 단어까지만 선택 가능합니다.
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
NTIS 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
DataON 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Edison 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Kafe 바로가기국가/구분 | United States(US) Patent 등록 |
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국제특허분류(IPC7판) |
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출원번호 | UP-0462011 (2006-08-02) |
등록번호 | US-7692961 (2010-05-20) |
발명자 / 주소 |
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출원인 / 주소 |
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대리인 / 주소 |
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인용정보 | 피인용 횟수 : 9 인용 특허 : 530 |
Programming a NVM memory cell such as an NROM cell by using hot hole injection (HHI), followed by channel hot electron (CHE) injection. CHE injection increases the threshold voltage (Vt) of bits of memory cells that were disturbed (unnecessarily programmed) in HHI programming step. Page Write may be
Programming a NVM memory cell such as an NROM cell by using hot hole injection (HHI), followed by channel hot electron (CHE) injection. CHE injection increases the threshold voltage (Vt) of bits of memory cells that were disturbed (unnecessarily programmed) in HHI programming step. Page Write may be performed using a combination of only HHI, followed by CHE without any Erase.
What is claimed is: 1. A method for programming a plurality of memory cells, each cell having a program verify voltage (PV) and an erase verify voltage (EV), the method comprising: programming first selected ones of the cells by decreasing the threshold voltage of the first selected ones of the cel
What is claimed is: 1. A method for programming a plurality of memory cells, each cell having a program verify voltage (PV) and an erase verify voltage (EV), the method comprising: programming first selected ones of the cells by decreasing the threshold voltage of the first selected ones of the cells to less than the program verify voltage (Vt<PV); and refreshing second selected ones of the cells by increasing the threshold voltage (Vt) of the second selected ones the cells to greater than the erase verify voltage (Vt>EV). 2. The method of claim 1, wherein: programming of said first selected ones of the cells is performed using Hot Hole Injection (HHI); and the refreshing is performed using Channel Hot Electron (CHE) injection. 3. A device comprising: a plurality of memory cells, each cell having a program verify voltage (PV) and an erase verify voltage (EV); and a controller coupled to the plurality of memory cells for programming first selected ones of said cells by decreasing the threshold verify voltage of the first selected ones of the cells to less than the program verify voltage (Vt<PV), and refreshing second selected ones of the cells by increasing the threshold voltage (Vt) of the second selected ones of the cells to greater than the erase verify voltage (Vt>EV). 4. The device of claim 3, wherein programming of said first selected ones of the cells is performed using Hot Hole Injection (HHI), and the refreshing is performed using Channel Hot Electron (CHE) injection. 5. A circuit for operating a nonvolatile memory array comprising: one or more charge pumps functionally associated with a plurality of memory cells, each cell having a program verify voltage (PV) and an erase verify voltage (EV); and a controller coupled to the plurality of memory cells for programming first selected ones of said cells by decreasing the threshold voltage of the first selected ones of the cells to less than the program verify voltage (Vt<PV), and refreshing second selected ones of the cells by increasing the threshold voltage (Vt) of the second selected ones of the cells to greater than the erase verify voltage (Vt>EV). 6. The circuit of claim 5, wherein programming of said first selected ones of the cells is performed using Hot Hole Injection (HHI), and the refreshing is performed using Channel Hot Electron (CHE) injection.
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