IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
UP-0633635
(2006-12-05)
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등록번호 |
US-7714562
(2010-06-03)
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발명자
/ 주소 |
- Oswald, Richard
- Yamamoto, Tamotsu
- Ryu, Takashi
- Tanabe, Hirohisa
- Koto, Masaaki
|
출원인 / 주소 |
|
대리인 / 주소 |
McDermott Will & Emery LLP
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인용정보 |
피인용 횟수 :
14 인용 특허 :
48 |
초록
▼
A switching regulator circuit including a high-side switch and a low-side switch; an inductor having a first terminal coupled to a common terminal between the high-side switch and the low-side switch, and a second terminal coupled to an output terminal of the switching regulator circuit; a low-pass
A switching regulator circuit including a high-side switch and a low-side switch; an inductor having a first terminal coupled to a common terminal between the high-side switch and the low-side switch, and a second terminal coupled to an output terminal of the switching regulator circuit; a low-pass filter coupled to the first terminal of the inductor, where the low-pass filter is operative for generating a ramp signal based on the voltage signal present at the first terminal of the inductor; and a hysteretic comparator coupled to the low pass filter, where the hysteretic comparator receives the ramp signal as an input signal, and generates an output signal which is operative for controlling the operation of the high-side switch and the low-side switch.
대표청구항
▼
What is claimed is: 1. A switching regulator circuit comprising: a high-side switch and a low-side switch coupled in a series configuration; an inductor having a first terminal coupled to a common terminal between said high-side switch and said low-side switch; and a second terminal coupled to an o
What is claimed is: 1. A switching regulator circuit comprising: a high-side switch and a low-side switch coupled in a series configuration; an inductor having a first terminal coupled to a common terminal between said high-side switch and said low-side switch; and a second terminal coupled to an output terminal of said switching regulator circuit; a low-pass filter coupled to said first terminal of said inductor, said low-pass filter generating a ramp signal based on the voltage signal present at said first terminal of said inductor; a buffer having an input terminal coupled to an output terminal of said low-pass filter, and said buffer circuit isolates said low-pass filter from said output terminal of said switching regulator circuit; and a hysteretic comparator coupled to said low pass filter via said buffer circuit, said hysteretic comparator receiving said ramp signal as an input signal, and generating an output signal which controls the operation of said high-side switch and said low-side switch; and a damping circuit having an input terminal coupled to an output terminal of said buffer circuit and an output terminal coupled to an input terminal of said hysteretic comparator, said damping circuit sampling an output voltage at said output terminal of the switching regulator circuit and adjusting the level of said ramp signal input into said hysteretic comparator said damping circuit comprising: a resistor coupled between an output of the buffer circuit and an input of the hysteristic comparator; and a resistor network coupled to said output terminal of switching regulator circuit, said resistor network configured as a voltage divider so as to feedback a reduced value of the output voltage to the input of said hysteretic comparator. 2. The switching regulator circuit of claim 1, wherein an amplitude of said ramp signal does not directly fluctuate with variations in the amount of current drawn by a load coupled to the switching regulator circuit. 3. The switching regulator circuit of claim 1, wherein said low pass filter comprises a first resistor and a second resistor coupled in a series configuration and a capacitor coupled in parallel with said second resistor, said first resistor being coupled to said first terminal of said inductor and a first terminal of said second resistor. 4. The switching regulator circuit of claim 1, wherein said ramp signal is a triangular wave. 5. The switching regulator circuit of claim 1, wherein said low-side switch comprises an active diode. 6. The switching regulator circuit of claim 1, further comprising a resistive component coupled between an output terminal of said buffer circuit and an input terminal of said hysteretic comparator. 7. The switching regulator circuit of claim 6, wherein said resistive component is coupled in a series configuration between the output terminal of said buffer circuit and said input terminal of said hysteretic comparator. 8. The switching regulator circuit of claim 1, wherein said hysteretic comparator receives a reference voltage as a second input signal. 9. A switching regulator circuit comprising: a high-side switch and a low-side switch coupled in a series configuration; an inductor having a first terminal coupled to a common terminal between said high-side switch and said low-side switch; and a second terminal coupled to an output terminal of said switching regulator circuit; a low-pass filter coupled to said first terminal of said inductor, said low-pass filter generating a ramp signal based on the voltage signal present at said first terminal of said inductor; a first buffer circuit having an input terminal coupled to an output terminal of said low-pass filter, said first buffer circuit isolates said low-pass filter from said output terminal of said switching regulator circuit; a damping circuit having a first input terminal coupled to an output terminal of said first buffer circuit, a second input terminal coupled to said output terminal of said switching regulator, and an output terminal; a hysteretic comparator coupled to said output terminal of said damping circuit, said hysteretic comparator receiving said ramp signal as an input signal, and generating an output signal which controls the operation of said high-side switch and said low-side switch; a second buffer circuit which receives a reference voltage signal as an input signal, and a switching network coupled to an output of said second buffer, said switching network coupling said output of said second buffer to said input of said first buffer if there is a change in the reference voltage signal, wherein said damping circuit comprises: a resistor coupled between an output of the buffer circuit and an input of the hysteristic comparator; and a resistor network coupled to said output terminal of switching regulator circuit, said resistor network configured as a voltage divider so as to feedback a reduced value of the output voltage to the input of said hysteretic comparator. 10. The switching regulator circuit of claim 9, wherein said switching network comprises a first diode and a second diode coupled in parallel with one another, said first diode and said second diode capable of conducting current in opposite directions within the switching network. 11. The switching regulator circuit of claim 10, wherein each of said first diode and said second diode are formed utilizing active diodes. 12. The switching regulator circuit of claim 9, wherein an amplitude of said ramp signal does not directly fluctuate with variations in the amount of current drawn by a load coupled to the switching regulator circuit. 13. The switching regulator circuit of claim 9, wherein said damping circuit samples an output voltage at said output terminal of said switching regulator circuit and adjusts the level of said ramp signal input into said hysteretic comparator. 14. The switching regulator circuit of claim 9, wherein said low pass filter comprises a first resistor and a second resistor coupled in a series configuration and a capacitor coupled in parallel with said second resistor, said first resistor being coupled to said first terminal of said inductor and a first terminal of said second resistor. 15. The switching regulator circuit of claim 9, wherein said ramp signal is a triangular wave. 16. The switching regulator circuit of claim 9, wherein said low-side switch comprises an active diode. 17. The switching regulator circuit of claim 9, wherein said damping circuit further comprising a resistive component coupled between the output terminal of said first buffer circuit and an input terminal of said hysteretic comparator. 18. The switching regulator circuit of claim 17, wherein said resistive component is coupled in a series configuration between the output terminal of said first buffer circuit and said input terminal of said hysteretic comparator. 19. The switching regulator circuit of claim 9, wherein said hysteretic comparator receives a reference voltage as a second input signal.
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