Method for optically testing semiconductor devices
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G01B-011/02
G01B-009/021
출원번호
UP-0120924
(2008-05-15)
등록번호
US-7733499
(2010-06-29)
발명자
/ 주소
Pfaff, Paul L.
출원인 / 주소
Attofemto, Inc.
대리인 / 주소
Davis Wright Tremaine LLP
인용정보
피인용 횟수 :
7인용 특허 :
40
초록▼
A method for optically testing semiconductor devices or wafers using a holographic optical interference system with an infrared or thermal light source providing a light beam of coherent wavelength with a wavelength to which the semiconductor material is transparent, splitting the light beam into a
A method for optically testing semiconductor devices or wafers using a holographic optical interference system with an infrared or thermal light source providing a light beam of coherent wavelength with a wavelength to which the semiconductor material is transparent, splitting the light beam into a reference beam and an object beam, imposing the object beam on the semiconductor material to generate a reflected object beam reflected from interior structures of the semiconductor material, adjusting the angle of the reference beam relative to the object beam between a plurality of angles with the semiconductor material being a different state for each angle of the reference beam, imposing the reflected object beam and the reference beam onto a detection device to create a plurality of interference patterns, one for each of the reference beam angles, and comparing the interference patterns to one another to determine and display characteristics within the semiconductor material.
대표청구항▼
The invention claimed is: 1. A method for optically testing and displaying internal stresses of semiconductor devices or wafers while being manufactured, the device or wafer under test being comprised a semiconductor conductor material having an interior surface and interior structures, comprising:
The invention claimed is: 1. A method for optically testing and displaying internal stresses of semiconductor devices or wafers while being manufactured, the device or wafer under test being comprised a semiconductor conductor material having an interior surface and interior structures, comprising: using a holographic optical interference system with at least one light source providing at least one light beam of coherent wavelength with a wavelength to which the semiconductor material is at least semi-transparent or transparent, splitting the light beam into a pair of beams, comprising a reference beam and an object beam, imposing the object beam on the exterior surface of the semiconductor material to generate a reflected object beam reflected from the interior structures of the semiconductor material, to generate a reflected beam reflected from the interior structures of the semiconductor material, adjusting the angle of incidence of the reference beam relative to the object beam between a plurality of angles with the semiconductor material being in a different state for each angle of the reference beam, imposing the reflected object beam and the reference beam onto a one or more detection devices to create a plurality of interference patterns of the reflected object beam with the reflected reference beam, one interference pattern at each of the plurality of angles of the reference beam, wherein the detection device or devices physically records or digitally stores the plurality of interference patterns, and comparing the plurality of interference patterns to one another to determine and display stress and interior structure characteristics within the semiconductor material, device or wafer. 2. The method of claim 1, wherein at least one of the states of the semiconductor material is an external stress, the external stress being produced by imposing incident electric or electromagnetic field or signals upon the semiconductor material or device. 3. The method of claim 1, wherein at least one of the states of the semiconductor material is an external stress, the external stress being produced by imposing incident voltages or chemical solutions upon the semiconductor material or device. 4. The method of claim 1, wherein at least one of the states of the semiconductor material is an external stress, the external stress being produced by imposing incident radio waves upon the semiconductor material or device. 5. The method of claim 1, wherein at least one or more detector devices records a plurality of interference patterns of a plurality of one or more external stresses which produce a change in the state of the refractive indexes or birefringence states of the semiconductor material or device. 6. The method of claim 5, wherein at least one of the states of the semiconductor material is a plurality of one or more external stresses are caused being produced by imposing a plurality of electromagnetic radiation stresses of one or more beams of differing wavelengths shorter than the characteristic threshold for the semiconductor material or device. 7. The method of claim 5, wherein at least one of the states of the semiconductor material is an external stress detected by means of triggering the recording or storage device of a plurality of interference patterns in synchrony with the imposition of a plurality of one or more external or internal stresses or electromagnetic signals or external stresses acting upon the semiconductor material or device. 8. The method of claim 5, wherein one or more beams incident to the semiconductor material or device and the interference pattern of each beam are recorded or detected by one or more recording or detector devices. 9. The method of claim 1, wherein the angles of the reference beam is adjusted to be converging or diverging to the object beam to enhance the visibility or contrast of the interference pattern with respect to a feature of the semiconductor material or device. 10. The method of claim 9, wherein automatic digital signal or image processing the plurality of interference patterns process and displays the plurality of internal stresses within the semiconductor material or feature or wafer at any desired stage of manufacture. 11. The method of claim 9, wherein the detection device records or digitally stores changes in the plurality of interference patterns to characterize and display at least one internal stress. 12. The method of claim 9, wherein the interference patterns are compared by digital signal or image processing with an electronic circuit coordinate map to determine and display at least one internal stress of a feature or an interior surface or structures within the semiconductor materials or external stress or stresses acting upon the semiconductor materials or wafer. 13. The method of claim 12, wherein the comparison of one or more interference patterns displays internal stresses and operating characteristics of features within the feature or interior structures or internal surfaces of the semiconductor material or wafer. 14. The method of claim 12, wherein by recording or comparing the interference pattern of at least one or more stresses acting upon the semiconductor material or wafer the interferometric pattern or patterns of differing stress states is determined or displayed. 15. The method of claim 12, wherein by recording at least one or more interference patterns of at least one or a plurality of internal stresses recorded at one or more different angles, for the same object beam, a plurality of interference patterns is obtained or displayed of at least one or a plurality of internal stresses within the semiconductor material or wafer. 16. The method of claim 15, wherein analysis of the plurality of interference patterns recorded at different angles generates two- or three-dimensional information of at least one internal stress acting upon an exterior surface or interior structures or feature within the semiconductor material or wafer.
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