IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
UP-0568646
(2005-05-05)
|
등록번호 |
US-7759623
(2010-08-09)
|
우선권정보 |
RU-2004113616(2004-05-05) |
국제출원번호 |
PCT/RU2005/000242
(2005-05-05)
|
§371/§102 date |
20071106
(20071106)
|
국제공개번호 |
WO05/106971
(2005-11-10)
|
발명자
/ 주소 |
- Teshima, Masahiro
- Mirzoyan, Razmik
- Dolgoshein, Boris Anatolievich
- Klemin, Sergey Nikolaevich
- Popova, Elena Viktorovna
- Filatov, Leonid Anatolievich
|
출원인 / 주소 |
- Max-Planck-Gesellschaft zur Foerderung der Wissenschaften E.V.
- Dolgoshein, Boris Anatolievich
|
대리인 / 주소 |
Porter, Wright, Morris & Arthur, LLP
|
인용정보 |
피인용 횟수 :
5 인용 특허 :
13 |
초록
▼
The invention relates to high-efficient light-recording detectors and can be used for nuclear and laser engineering, and in technical and medical tomography etc. The inventive silicon photoelectric multiplier (variant 1) comprising a p++ type conductivity substrate whose dope additive concentration
The invention relates to high-efficient light-recording detectors and can be used for nuclear and laser engineering, and in technical and medical tomography etc. The inventive silicon photoelectric multiplier (variant 1) comprising a p++ type conductivity substrate whose dope additive concentration ranges from 1018 to 1020 cm −3 and which consists of cells, each of which comprises a p− type conductivity epitaxial layer whose dope additive concentration is gradually changeable from 1018 to 1014 cm−3 and which is grown on the substrate, a p− type conductivity layer whose dope additive concentration ranges from 1015 to 1017 cm−3 and a n+ type conductivity layer whose dope additive concentration ranges from 1018 to 1020 cm−3, wherein a polysilicon resistor connecting the n+ type conductivity layer with a feed bar is arranged in each cell on a silicon oxide layer and separating elements are disposed between the cells. Said silicon photoelectric multiplier (variant 2) comprising a n− type conductivity substrate to which a p++-type conductivity whose dope additive concentration ranges from 1018-1020 cm−3 is applied and consists of cells, wherein in each cell a polysilicon resistor is placed on a silicon oxide layer and separating elements are disposed between the cells.
대표청구항
▼
The invention claimed is: 1. A silicon photoelectric multiplier comprising: a p++ conductance type substrate having 1018-1020 cm−3 of a doping agent concentration; a plurality of cells, each cell including: a p conductance type epitaxial layer having 1018-1014 cm−3 of the doping agent
The invention claimed is: 1. A silicon photoelectric multiplier comprising: a p++ conductance type substrate having 1018-1020 cm−3 of a doping agent concentration; a plurality of cells, each cell including: a p conductance type epitaxial layer having 1018-1014 cm−3 of the doping agent concentration varied gradually, said epitaxial layer grown on the substrate; a p conductance type layer having 1015-1017 cm−3 of the doping agent concentration; an n+ conductance type layer having 1018-1020 cm−3 of the doping agent concentration; and a polysilicon resistor located on a silicon oxide layer in each cell, said polysilicon resistor connecting the n+ conductance type layer with a voltage distribution bus; and separating elements disposed between the cells. 2. A silicon photoelectric multiplier comprising: an n conductance type substrate; a p++ conductance type layer having 1018-1020 cm−3 of a doping agent concentration, said p++ conductance type layer applied on said substrate; a plurality of cells, each cell including: a p conductance type epitaxial layer having 1018-1014 cm−3 of the doping agent concentration varied gradually, said p conductance type layer grown on the p++ conductance type layer; a p conductance type layer having 1015-1017 cm−3 of the doping agent concentration; an n+ conductance type layer having 1018-1020 cm−3 of the doping agent concentration; and a polysilicon resistor is located on a silicon oxide layer in each cell, said polysilicon resistor connecting the n+ conductance type layer with a voltage distribution bus; and separating elements disposed between the cells. 3. A cell of a silicon photoelectric multiplier, comprising a p conductance type epitaxial layer having 1018-1014 cm−3 of a doping agent concentration varied gradually, a p conductance type layer having 1015-1017 cm−3 of the doping agent concentration, an n+ layer, forming a donor part of a p-n boundary, and having 1018-1020 cm−3 of the doping agent concentration, and a polysilicon resistor located on a silicon oxide layer, said resistor connecting the n+ layer with a voltage supply bus. 4. A silicon based photo-electric multiplier, comprising: an n/p substrate of a second conductivity type; a p++/n++ doping layer of a first conductivity type formed on the substrate, the doping layer and the substrate forming a first n-p junction at an interface therebetween; a plurality of cells, the cells being arranged above the doping layer and each one of the cells comprising: a p/n epitaxial layer of the first conductivity type formed on the doping layer; a p/n first layer of the first conductivity type formed within the expitaxial layer; an n+/p+ second layer of a second conductivity type formed on the first layer, the first layer and the second layer forming a second n-p junction at an interface therebetween; an insulation layer formed on the second layer; and a resistor located on the insulation layer and connecting the second layer to a voltage distribution bus; and wherein the epitaxial layer comprises a spatial gradient in the doping concentration, a doping concentration being decreased from a relatively high value at a boundary between the epitaxial layer and the doping layer to a relatively low value at a photosensitive surface of the epitaxial layer in order to create a built-in electrical field of high uniformity within the expitaxial layer. 5. The silicon based photo-electric multiplier according to claim 4, wherein the doping layer comprises a doping level in the range 1018-1020 cm−3. 6. The silicon based photo-electric multiplier according to claim 5, wherein a doping concentration of the first layer is in a range of 1015-1017 cm−3. 7. The silicon based photo-electric multiplier according to claim 5, wherein the spatial gradient in the doping concentration of the epitaxial layer is formed by a spatial variation of the doping concentration from 1014 to 1018 cm−3. 8. The silicon based photo-electric multiplier according to claim 7, wherein a doping concentration of the first layer is in a range of 1015-1017 cm−3. 9. The silicon based photo-electric multiplier according to claim 4, wherein the spatial gradient in the doping concentration of the epitaxial layer is formed by a spatial variation of the doping concentration from 1014 to 1018 cm−3. 10. The silicon based photo-electric multiplier according to claims 9, wherein a doping concentration of the first layer is in a range of 1015-1017 cm−3. 11. The silicon based photo-electric multiplier according to anyone of claims 4, wherein a doping concentration of the first layer is in a range of 1015-1017 cm−3. 12. The silicon based photo-electric multiplier according to claim 4, wherein the insulation layer comprises silicon oxide. 13. The silicon based photo-electric multiplier according to claim 4, wherein the resistor comprises polysilicon. 14. The silicon based photo-electric multiplier according to any one of claims 4 to 13, wherein separating elements are disposed between the cells. 15. The silicon based photo-electric multiplier according to claim 14, wherein the separating elements are formed as triangular V-grooves obtainable by anisotropic etching of the silicon. 16. A silicon based photo-electric multiplier, comprising: a substrate of a first conductivity type; a plurality of cells, the cells being arranged above the substrate and each one of the cells comprising: an epitaxial layer of the first conductivity type formed on the substrate; a first layer of the first conductivity type formed within the epitaxial layer; a second layer of a second conductivity type formed on the first layer, the first layer and the second layer forming an n-p junction at an interface there between, an insulation layer formed on the second layer; and a resistor located on the insulation layer and connecting the second layer to a voltage distribution bus; and wherein the epitaxial layer comprises a spatial gradient in the doping concentration, the doping concentration being decreased from a relatively high value at a boundary between the epitaxial layer and a doping layer to a relatively low value at a photosensitive surface of the epitaxial layer in order to create a built-in electrical field of high uniformity within the epitaxial layer. 17. The silicon based photo-electric multiplier according to claim 16, wherein a doping layer comprises a doping level in the range 1018-1020 cm−3. 18. The silicon based photo-electric multiplier according to claim 17, wherein a doping concentration of the first layer is in a range of 1015-1017 cm−3. 19. The silicon based photo-electric multiplier according to claim 17, wherein the spatial gradient in the doping concentration of the epitaxial layer is formed by a spatial variation of the doping concentration from 1014 to 1018 cm−3. 20. The silicon based photo-electric multiplier according to claim 19, wherein a doping concentration of the first layer is in a range of 1015-1017 cm−3. 21. The silicon based photo-electric multiplier according to claim 16, wherein the spatial gradient in the doping concentration of the epitaxial layer is formed by a spatial variation of the doping concentration from 1014 to 1018 cm−3. 22. The silicon based photo-electric multiplier according to claims 21, wherein a doping concentration of the first layer is in a range of 1015-1017 cm−3. 23. The silicon based photo-electric multiplier according to anyone of claims 16, wherein a doping concentration of the first layer is in a range of 1015-1017 cm −3. 24. The silicon based photo-electric multiplier according to claim 16, wherein the insulation layer comprises silicon oxide. 25. The silicon based photo-electric multiplier according to claim 16, wherein the resistor comprises polysilicon. 26. The silicon based photo-electric multiplier according to any one of claims 16 to 25, wherein separating elements are disposed between the cells. 27. The silicon based photo-electric multiplier according to claim 26, wherein the separating elements are formed as triangular V-grooves obtainable by anisotropic etching of the silicon.
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