Integrated circuit including a semiconductor device
원문보기
IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
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출원번호 |
UP-0870750
(2007-10-11)
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등록번호 |
US-7800171
(2010-10-11)
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우선권정보 |
DE-10 2006 048 625(2006-10-13) |
발명자
/ 주소 |
- Von Borcke, Mathias
- Zundel, Markus
- Meyer, Thorsten
- Schmalzbauer, Uwe
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출원인 / 주소 |
- Infineon Technologies Austria AG
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대리인 / 주소 |
Dicke, Billig & Czaja, PLLC
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인용정보 |
피인용 횟수 :
3 인용 특허 :
3 |
초록
▼
An integrated circuit including a semiconductor device is disclosed. One embodiment provides a load current component, having a multiplicity of trenches in a cell array. A sensor component is integrated into the cell array of the load current component and has a sensor cell array, the area of which
An integrated circuit including a semiconductor device is disclosed. One embodiment provides a load current component, having a multiplicity of trenches in a cell array. A sensor component is integrated into the cell array of the load current component and has a sensor cell array, the area of which is smaller than the area of the cell array of the load current component by a specific factor. The trenches forming the cell array of the sensor component correspond to the trenches of the cell array of the load current component, configured such that the trenches of the sensor component at the at least one side merge uniformly into the trenches of the cell array of the load current component without interruptions or disturbances of the trench geometry.
대표청구항
▼
What is claimed is: 1. An integrated circuit including a semiconductor device comprising: a power component, having a multiplicity of trenches in a cell array, wherein the trenches run all parallel and at the same distance with respect to one another in same direction; and a sensor component, integ
What is claimed is: 1. An integrated circuit including a semiconductor device comprising: a power component, having a multiplicity of trenches in a cell array, wherein the trenches run all parallel and at the same distance with respect to one another in same direction; and a sensor component, integrated into the cell array of the load current component and having a sensor cell array, an area of which is smaller than an area of the cell array of the power component by a specific factor, wherein the trenches forming the cell array of the sensor component correspond to the trenches of the cell array of the load current component, such that the trenches of the sensor component at the at least one side merge uniformly into the trenches of the cell array of the power component without interruptions or disturbances of the trench geometry. 2. The integrated circuit of claim 1, comprising: wherein the sensor component is a FET having source, gate and drain electrodes and is integrated as current sensor for detecting a current flowing through the load current component, configured as a FET; and wherein on the one hand the gates in each case of the power component and of the sensor component and on the other hand the drain electrodes in each case of the load current component and of the sensor component are shared. 3. The integrated circuit device of claim 1, comprising wherein on both sides of a transition from the cell array of the power component to that of the sensor component the source/body regions of the load current component and of the sensor component are present in identical fashion and a respective source potential can be applied to them. 4. The integrated circuit of claim 1, further comprising a gate electrode in the trenches of the power component and of the sensor component is present in identical fashion and the same potential can be applied to each of them. 5. The integrated circuit of claim 1, wherein the sensor component, at least one side, is directly in contact with one side of the cell array of the load current component in the sense that sensor cells of the sensor component to which sensor potential is applied and cells of the power component to which the cell array potential of said load current component is applied are at a distance of less than two pitches from one another. 6. The integrated circuit of claim 1, wherein the trenches forming the cell array of the sensor component correspond to the trenches of the cell array of the power component in terms of geometry, regular sequence and construction at its other sides, too. 7. The integrated circuit of claim 1, comprising source implant strip provided in the direction of the trenches above and below the sensor component. 8. The integrated circuit of claim 1, wherein the power component and the sensor component are N-DMOS transistors. 9. The integrated circuit of claim 1, wherein the power component and the sensor component are P-DMOS transistors. 10. The integrated circuit of claim 4, wherein further electrodes are present in identical fashion in the trenches of the power component and of the sensor component. 11. The integrated circuit of claim 1, wherein electrodes are provided in the trenches of the cell array; and wherein all the trenches forming the cell array of the sensor component, electrodes formed therein, and an oxide that insulates them are in each case identical in terms of their geometry, regular sequence and their construction and, at least one side of the sensor component in each case correspond to the trenches, the electrodes formed therein and the oxide that insulates them of the cell array of the power component, such that the trenches, the electrodes formed therein and the oxide that insulates them of the sensor component at least one side merge uniformly into the trenches corresponding to them, the electrodes formed therein and the oxide that insulates them of the cell array of the load current component without interruptions or disturbances of their geometry and their construction. 12. The integrated circuit of claim 1, wherein the power component and the sensor component are configured to operate as a power switch.
이 특허에 인용된 특허 (3)
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Beasom James Douglas (Melbourne Village FL), Method for making ohmic contact to lightly doped islands from a silicide buried layer and applications.
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Hierold Christofer (Munich DEX) Schwarzbauer Herbert (Munich DEX), Power semiconductor component with monolithically integrated sensor arrangement as well as manufacture and employment th.
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Barker Richard J.,GBX, Power transistor device having hot-location and cool-location temperature sensors.
이 특허를 인용한 특허 (3)
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Ioannou, Dimitris P.; Kothandaraman, Chandrasekharan, CMOS device with reading circuit.
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Thiele, Steffen; Meiser, Andreas; Zundel, Markus, Current sense transistor with embedding of sense transistor cells.
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Meiser, Andreas; Zundel, Markus; Thiele, Steffen, Integrated circuit, semiconductor device and method of manufacturing a semiconductor device.
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