초록 ▼

A capacitive operation method for quantum computing is disclosed where providing a sequence of write pulses above a threshold voltage induces a single charge population, forming a quantum dot (Q-dot). Determining if the single charge population was induced in the Q-dot occurs by monitoring capacitan

A capacitive operation method for quantum computing is disclosed where providing a sequence of write pulses above a threshold voltage induces a single charge population, forming a quantum dot (Q-dot). Determining if the single charge population was induced in the Q-dot occurs by monitoring capacitance changes while the writing is performed. Q-bits (Q-dot pairs) are formed without requiring a separate transistor for each Q-dot by multiplexing the calibration. A device which is able to perform the above method is also disclosed. The device utilizes the ability of cryogenic capacitance bridge circuits to measure the capacitance change caused by the introduction of a single charge population to a Q-dot. The device also permits swapping of Q-dot and Q-bit pairs utilizing a signal multiplexed with the voltage pulses that write (e.g. change the charge population) to the Q-dots.

대표청구항 ▼

What is claimed is: 1. A capacitive calibration method for quantum computing, comprising: providing at least one quantum dot; providing a cryogenic capacitance bridge circuit connected to the quantum dot via a read/write line; writing to a quantum dot of said at least one quantum dot by providing a

What is claimed is: 1. A capacitive calibration method for quantum computing, comprising: providing at least one quantum dot; providing a cryogenic capacitance bridge circuit connected to the quantum dot via a read/write line; writing to a quantum dot of said at least one quantum dot by providing a write pulse on the read/write line to a gate accessing said quantum dot to induce a single charge population within said quantum dot, wherein said write pulse is above a threshold voltage value; and reading said quantum dot by measuring capacitance changes across said quantum dot, wherein the measuring is performed by the cryogenic capacitance bridge circuit. 2. The method of claim 1, wherein the cryogenic capacitance bridge circuit includes a high electron mobility transistor (HEMT). 3. The method of claim 1, further comprising determining by said reading if said writing to said quantum dot induced said single charge population. 4. The method of claim 1, wherein the writing to said quantum dots is performed by said cryogenic capacitance bridge circuit providing the write pulse to the read/write line. 5. The method of claim 1, further comprising immersing said quantum dot and said cryogenic capacitance bridge circuit in an isotope of liquid helium in order to reduce the temperature of the cryogenic capacitance bridge circuit. 6. The method of claim 1, further comprising a dual-channel phase-loop-locked amplifier adapted to amplify an output of the cryogenic capacitance bridge circuit. 7. The method of claim 1, further comprising performing a swap operation on adjoining quantum dots, said adjoining quantum dots forming a pair of quantum dots, by providing swap dot pulses to a first set of swap gates positioned between two quantum dots to be swapped. 8. The method of claim 7, further comprising swapping adjoining pairs of quantum dots by providing swap qubit pulses to a second set of swap gates positioned between two pairs of quantum dots to be swapped. 9. The method of claim 1, wherein the reading includes detecting peak capacitance point in relation to gate voltage. 10. The method of claim 1, wherein multiple q-dots are calibrated by multiplexing the write pulse with other write pulses. 11. A capacitive calibration system comprising: a cryogenic capacitance bridge circuit and one or more quantum dots to be tested within the cryogenic capacitance bridge circuit by connecting the one or more quantum dots to the cryogenic capacitance bridge circuit via a read/write line; wherein the cryogenic capacitance bridge circuit is structured such that it detects a single electron charging event in each of said one or more quantum dots; and a write pulse on the read/write line to a gate accessing said quantum dot to induce a single charge population within said quantum dot, wherein said write pulse is above a threshold voltage value. 12. The system of claim 11, further comprising: a first plurality of gates providing access to each of said one or more quantum dots, wherein designated neighboring pairs of quantum dots form qubits, said qubits each including two quantum dots. 13. The system of claim 12, further comprising: a second plurality of gates, wherein each of said second plurality of gates provides access between the two quantum dots within each said qubit to allow a swap operation on said two quantum dots. 14. The system of claim 13, further comprising: a third plurality of gates between neighboring qubits to allow access to perform a swap operation on said neighboring qubits. 15. The system of claim 11, wherein the cryogenic capacitance bridge circuit further includes a high electron mobility transistor (HEMT). 16. The system of claim 14, further comprising de-multiplexing circuits on lines connected to the first plurality of gates, the second plurality of gates, and the third plurality of gates. 17. The system of claim 11, further comprising a dual-channel phase-loop-locked amplifier adapted to amplify the output of the cryogenic capacitance bridge circuit.