$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

[미국특허] Electrical contactor, especially wafer level contactor, using fluid pressure 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01R-004/60
출원번호 US-0783379 (2010-05-19)
등록번호 US7967621 (2011-06-15)
발명자 / 주소
  • Eldridge, Benjamin N.
출원인 / 주소
  • FormFactor, Inc.
대리인 / 주소
    Kirton & McConkie
인용정보 피인용 횟수 : 4  인용 특허 : 102

초록

An electrical interconnect assembly and methods for making an electrical interconnect assembly. In one embodiment, an interconnect assembly includes a flexible wiring layer having a plurality of first contact elements and a fluid containing structure which is coupled to the flexible wiring layer. Th

대표청구항

What is claimed is: 1. An interconnect assembly comprising:a wiring layer having first contact elements;a flexible layer configured to hold a device under test such that second contact elements of said device under test are disposed adjacent to but spaced apart from said first contact elements; anda

이 특허에 인용된 특허 (102) 인용/피인용 타임라인 분석

  1. D\Souza Daniel B. (Santa Clara County CA), Active probe card.
  2. Cherry Robert S. (Redondo Beach CA), Active probe card for high resolution/low noise wafer level testing.
  3. Driller Hubert (Schmitten DEX) Mang Paul (Schmitten DEX), Adapter arrangement for electrically connecting flat wire carriers.
  4. Littlebury Hugh W. (Chandler AZ) Simmons Marion I. (Tempe AZ), Apparatus and method for burning in integrated circuit wafers.
  5. Dean Anthony James (Congleton EN), Apparatus for testing printed circuit boards.
  6. Yojima Masayuki,JPX ; Tsujide Tohru,JPX ; Nakaizumi Kazuo,JPX, Apparatus for testing semiconductor wafer.
  7. Grabbe Dimitry G. (Middletown PA), Area array connector.
  8. Pedder David John,GBX, Bare die testing.
  9. Ohkubo Masao (Tokyo JPX) Yoshimitsu Yasuro (Tokyo JPX), Complex probe card for testing a semiconductor wafer.
  10. Okubo Masao (Tokyo JPX) Yoshimitsu Yasuro (Tokyo JPX), Complex probe card for testing a semiconductor wafer.
  11. Kwon Oh-Kyong (Richardson TX) Malhi Satwinder (Garland TX) Hashimoto Masahi (Garland TX), Compliant contact pad.
  12. Benjamin N. Eldridge ; Igor Y. Khandros ; David V. Pedersen ; Ralph G. Whitten, Concurrent design and subsequent partitioning of product and test die.
  13. Cutchaw John M. (Scottsdale AZ), Connector for integrated circuit packages.
  14. Khandros Igor Y. ; Eldridge Benjamin N. ; Mathieu Gaetan L. ; Dozier Thomas H. ; Smith William D., Contact carriers (tiles) for populating larger substrates with spring contacts.
  15. Junichi Hagihara JP; Shinji Iino JP, Contactor and production method for contractor.
  16. Golla Naidu G. (Austin TX), Debug apparatus for an automated semiconductor testing system.
  17. Nolan Steven ; Bartilson Bradley W. ; Kunkel Ronald, Demateable, compliant, area array interconnect.
  18. Crowley Richard N. (Aloha OR), Driven guard probe card.
  19. Kister January, Dual contact probe assembly for testing integrated circuits.
  20. Benjamin N. Eldridge, Electrical contactor especially wafer level contactor using fluid pressure.
  21. Eldridge,Benjamin N., Electrical contactor, especially wafer level contactor, using fluid pressure.
  22. Eldridge,Benjamin N., Electrical contactor, especially wafer level contactor, using fluid pressure.
  23. Loranger J. Albert ; Chung Wotaek, Electrical socket with floating guide plate.
  24. Mendenhall David W. (Greenville RI) Goff Jay T. (Cranston RI), Flex dot wafer probe.
  25. Khandros Igor Y. ; Mathieu Gaetan L., Flexible contact structure with an electrically conductive shell.
  26. Leedy Glenn J. (1061 E. Mountain Dr. Santa Barbara CA 93108), Flexible tester surface for testing integrated circuits.
  27. Knight Alan D. (Newark Valley NY) Petrozello James R. (Endicott NY), Fluid pressure actuated electrical connector.
  28. Grabbe Dimitry G. (Middletown PA), High density connector for an IC chip carrier.
  29. Grabbe Dimitry G. (Middletown PA), High density electrical connector system.
  30. Parrish Frank, High density printed circuit board.
  31. Bross Arthur (Poughkeepsie NY) Walsh Thomas J. (Poughkeepsie NY), High density probe.
  32. Whann Welton B. (San Diego CA) Elizondo Paul M. (Escondido CA), High density probe card.
  33. Subramanian Eswar (Phoenix AZ), High density probe card for testing electrical circuits.
  34. Ardezzone Frank J. (Santa Clara CA), High density probe-head with isolated and shielded transmission lines.
  35. Kwon On-Kyong (Plano TX) Hashimoto Masashi (Garland TX) Malhi Satwinder (Garland TX), High performance test head and method of making.
  36. Martel Anthony Paul ; McQuade Francis T., Impedance-matched interconnection device for connecting a vertical-pin integrated circuit probing device to integrated circuit test equipment.
  37. Perry Charles H. (Poughkeepsie NY) Bauer Tibor L. (Hopewell Junction NY) Long David C. (Wappingers Falls NY) Pickering Bruce C. (Wappingers Falls NY) Vittori Pierre C. (Cold Spring NY), Interface card for a probe card assembly.
  38. Bargain Raymond (Sartrouville FRX) Riverie Jean (Limours FRX) Ollivier Jean-Francois (Versailles FRX), Intermediate connector for use between a printed circuit card and a substrate for electronic circuits.
  39. Lee Shaw Wei (10410 Miller Ave. Cupertino CA 95014), Known good die test apparatus and method.
  40. Patrick A. Coico ; Benjamin V. Fasano, Land grid array alignment and engagement design.
  41. Dennis Richard Kay (Etters PA) Hadden Edward Leal (Mechanicsburg PA), Leadless package retaining frame.
  42. Schwindt Randy J., Low-current probe card with reduced triboelectric current generating cables.
  43. Amemiya Hiroshi,JPX, Low-temperature wafer testing method and prober.
  44. Leedy Glenn J. (Santa Barbara CA), Making and testing an integrated circuit using high density probe points.
  45. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Making discrete power connections to a space transformer of a probe card assembly.
  46. Kasukabe Susumu (Yokohama JPX) Takagi Ryuichi (Tokyo JPX), Manufacturing method of a probe head for semiconductor LSI inspection apparatus.
  47. Crumly William R. (Anaheim CA), Membrane connector with stretch induced micro scrub.
  48. Gleason K. Reed ; Smith Kenneth R. ; Bayne Mike, Membrane probing system with local contact scrub.
  49. Roemer Robert W. ; Williams Eddie V., Method and apparatus for securing an electronic package to a circuit board.
  50. Belmont Andre,FRX ; Reynaud Vincent,FRX ; Daniau William,FRX, Method for making cards with multiple contact tips for testing semiconductor chips.
  51. DeHaven Robert Keith (Austin TX) Wenzel James F. (Austin TX), Method for manufacturing a stimulus wafer for use in a wafer-to-wafer testing system to test integrated circuits located.
  52. Lum Thomas F. (Austin TX) Wenzel James F. (Austin TX), Method for probing a semiconductor wafer.
  53. Malhi Satwinder (Garland TX) Kwon Oh-Kyong (Richardson TX), Method of forming an apparatus for burn in testing of integrated circuit chip.
  54. Leedy Glenn J. (1061 E. Mountain Dr. Santa Barbara CA 93108), Method of making a flexible tester surface for testing integrated circuits.
  55. Eldridge Benjamin N. ; Khandros Igor Y. ; Mathieu Gaetan L. ; Pedersen David V., Method of making microelectronic spring contact elements.
  56. Khandros Igor Y., Method of making raised contacts on electronic components.
  57. Khandros Igor Y. (Peekskil NY), Method of manufacturing electrical contacts, using a sacrificial member.
  58. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of planarizing tips of probe elements of a probe card assembly.
  59. Watanabe Takashi,JPX ; Yoshida Minako,JPX, Method of producing micro contact structure and contact probe using same.
  60. Leedy Glenn J. (Santa Barbara CA), Method of repairing an integrated circuit structure.
  61. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of testing semiconductor.
  62. Palagonia Anthony Michael ; Pikna Paul Joseph ; Maddix John Thomas, Micro probe assembly and method of fabrication.
  63. Maddix John Thomas ; Palagonia Anthony Michael ; Pikna Paul Joseph ; Vallett David Paul, Micro probe ring assembly and method of fabrication.
  64. Gilleo Kenneth B. ; Karavakis Konstantine, Microelectronic component mounting with deformable shell terminals.
  65. Swapp Mavin (Mesa AZ), Micromachined semiconductor probe card.
  66. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Mounting spring elements on semiconductor devices.
  67. Evans Arthur (Broofield Center CT), Multi-level test probe assembly for IC chips.
  68. Driller Hubert (Schmitten DEX) Mang Paul (Schmitten DEX), Printed circuit board testing device with foil adapter.
  69. Yamaguchi Masao (Tokyo JPX), Probe apparatus.
  70. Soejima Koji,JPX ; Senba Naoji,JPX, Probe card and method of forming a probe card.
  71. Hembree David R. ; Farnworth Warren M. ; Akram Salman ; Wood Alan G. ; Doherty C. Patrick ; Krivy Andrew J., Probe card and testing method for semiconductor wafers.
  72. Higgins H. Dan (323 E. Redfield Chandler AZ 85225), Probe card apparatus.
  73. Carlin Scott J. (Austin TX) Roberts ; Jr. Samuel (Austin TX), Probe card apparatus having a heating element and process for using the same.
  74. Higgins H. Dan ; Pandey Rajiv ; Armendariz Norman J. ; Bates R. Dennis, Probe card assembly for high density integrated circuits.
  75. Trenary Dale T. (San Jose CA), Probe card for integrated circuit chip.
  76. Okubo Masao (Nishinomiya JPX) Murakami Nobuyuki (Amagasaki JPX) Katahira Kouji (Kikuchi-gun JPX) Iwata Hiroshi (Otokuni-gun JPX) Okubo Kazumasa (Naka-gun JPX), Probe card for maintaining the position of a probe in high temperature application.
  77. Benjamin N. Eldridge ; Gary W. Grube ; Gaetan L. Mathieu, Probe card for probing wafers with raised contact elements.
  78. Hembree David R. ; Farnworth Warren M. ; Akram Salman ; Wood Alan G. ; Doherty C. Patrick ; Krivy Andrew J., Probe card for semiconductor wafers and method and system for testing wafers.
  79. Monnet Ren (Seyssinet-Pariset FRX) Perrin Maurice (Saint Etienne de Crossey FRX), Probe card for testing integrated circuit chips.
  80. Yoon Jong-Chil,KRX ; Kim Jeung-Dae,KRX ; Kim Young-Syup,KRX, Probe card for testing semiconductor devices.
  81. Nakata Yoshiro,JPX, Probe card for wafer-level measurement, multilayer ceramic wiring board, and fabricating methods therefor.
  82. Doherty C. Patrick ; deVarona Jorge L. ; Akram Salman, Probe card having on-board multiplex circuitry for expanding tester resources.
  83. Okubo Kazumasa (Kanagawa JPX) Okubo Masao (Nishinomiya JPX) Yoshimitsu Yasuro (Takatsuki JPX) Sugaya Kiyoshi (Amagasaki JPX), Probe card in which contact pressure and relative position of each probe end are correctly maintained.
  84. Mizuta Masaharu,JPX, Probe card with vertical needle for enabling improved wafer testing and method of manufacturing the same.
  85. Theodore A. Khoury ; Mark R. Jones ; R. Keith Lee, Probe contactor and production method thereof.
  86. Sano Kunio (Nakakoma-gun JPX), Probe device.
  87. Kiyoshi Takekoshi JP, Probing card.
  88. Atkins Glen G. (Boise ID) Cohen Michael S. (Boise ID) Mauritz Karl H. (Eagle ID) Shaffer James M. (Boise ID), Repairable wafer scale integration system.
  89. Otsuka Kanji (Higashiyamato JPX) Kato Masao (Hadano JPX) Kumagai Takashi (Isehara JPX) Usami Mitsuo (Ohme JPX) Kuroda Shigeo (Ohme JPX) Sahara Kunizo (Nishitama JPX) Yamada Takeo (Koganei JPX) Miyamo, Semiconductor device having leads for mounting to a surface of a printed circuit board.
  90. Isaac George L. ; Miller Donald C. ; Ziegenhagen ; II Rodney Scott, Semiconductor test socket and contacts.
  91. Berar Andrei, Semiconductor tester system including test head supported by wafer prober frame.
  92. Thompson Patrick F. ; Williams William M. ; Lindsey Scott E. ; Vasquez Barbara, Semiconductor wafer contact system and method for contacting a semiconductor wafer.
  93. James Marc Leas ; Robert William Koss ; Jody John Van Horn ; George Frederick Walker ; Charles Hampton Perry ; David Lewis Gardell ; Steve Leo Dingle ; Ronald Prilik, Semiconductor wafer test and burn-in.
  94. Leas James M. (South Burlington VT) Koss Robert W. (Burlington VT) Walker George F. (New York NY) Perry Charles H. (Poughkeepsie NY) Van Horn Jody J. (Underhill VT), Semiconductor wafer test and burn-in.
  95. Briggs Merton Darrell ; Miller Alfred H., Socket including centrally distributed test tips for testing unpackaged singulated die.
  96. Brown Candice H. (San Jose CA), Test fixture capable of electrically testing an integrated circuit die having a planar array of contacts.
  97. Schmid Rainer,DEX ; Giringer Klaus,DEX ; Gauss Ulrich,DEX ; Deusch Heinz,DEX, Test head for microstructures with interface.
  98. Beaman Brian Samuel ; Fogel Keith Edward ; Lauro Paul Alfred ; Norcott Maurice Heathcote ; Shih Da-Yuan ; Walker George Frederick, Test probe for high density integrated circuits, methods of fabrication thereof and methods of use thereof.
  99. Barabi Nasser, Test socket for an IC device.
  100. Lau James C. K. (Torrance CA) Malmgren Richard P. (Castaic CA) Lui Kenneth (Fountain Valley CA), Testing device for integrated circuits on wafer.
  101. Khandros Igor Y. ; Pedersen David V., Wafer-level burn-in and test.
  102. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Wafer-level test and burn-in, and semiconductor process.

이 특허를 인용한 특허 (4) 인용/피인용 타임라인 분석

  1. Beroz, Masud, Fluid pressure activated electrical contact devices and methods.
  2. Beroz, Masud, Fluid pressure activated electrical contact devices and methods.
  3. Beroz, Masud, Fluid pressure activated electrical contact devices and methods.
  4. Beroz, Masud, Multiplexing, switching and testing devices and methods using fluid pressure.

활용도 분석정보

상세보기
다운로드
내보내기

활용도 Top5 특허

해당 특허가 속한 카테고리에서 활용도가 높은 상위 5개 콘텐츠를 보여줍니다.
더보기 버튼을 클릭하시면 더 많은 관련자료를 살펴볼 수 있습니다.

섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로