$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

[미국특허] Methods of fabricating transistors including dielectrically-supported gate electrodes and related devices 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-029/66
출원번호 US-0724656 (2010-03-16)
등록번호 US8049252 (2011-10-17)
발명자 / 주소
  • Smith, Richard Peter
  • Sheppard, Scott T.
출원인 / 주소
  • Cree, Inc.
대리인 / 주소
    Myers Bigel Sibley & Sajovec, P.A.
인용정보 피인용 횟수 : 71  인용 특허 : 130

초록 ▼

Transistors are fabricated by forming a protective layer having a first opening extending therethrough on a substrate, forming a dielectric layer on the protective layer having a second opening extending therethrough that is wider than the first opening, and forming a gate electrode in the first and

대표청구항 ▼

That which is claimed: 1. A transistor, comprising:a protective layer having a first opening extending therethrough, wherein the protective layer comprises a high-purity nitride (HPN) layer;a dielectric layer on the protective layer, the dielectric layer having a second opening extending therethroug

이 특허에 인용된 특허 (130) 인용/피인용 타임라인 분석

  1. Smith, Richard Peter, Aluminum gallium nitride/gallium nitride high electron mobility transistors having a gate contact on a gallium nitride based cap segment.
    상세보기
  2. Edmond John A. (Apex NC) Dmitriev Vladimir (Fuquay-Varina NC) Irvine Kenneth (Cary NC), Buffer structure between silicon carbide and gallium nitride and resulting semiconductor devices.
    상세보기
  3. Nariani Subhash R. (San Jose CA) Pramanik Dipankar (Cupertino CA), Charge neutralization using silicon-enriched oxide layer.
    상세보기
  4. Nariani Subhash R. (Tracy CA) Pramanik Dipankar (Union City CA), Charge neutralization using silicon-enriched oxide layer.
    상세보기
  5. Yokoyama Mitsunori,JPX ; Tanaka Hitoshi,JPX ; Wada Jun,JPX, Compound semiconductor device having a reduced source resistance.
    상세보기
  6. Subramanian,Ramkumar; Lyons,Christopher F.; Plat,Marina V.; Singh,Bhanwar, Damascene process for a T-shaped gate electrode.
    상세보기
  7. Ogihara Mitsuhiko (Tokyo JPX) Nakamura Yukio (Tokyo JPX) Koizumi Masumi (Tokyo JPX) Taninaka Masumi (Tokyo JPX), Diffusion mask and fabrication method for forming pn-junction elements in a compound semiconductor substrate.
    상세보기
  8. Hida Hikaru (Tokyo JPX) Ohata Keiichi (Tokyo JPX), Double heterojunction semiconductor device with injector.
    상세보기
  9. Francis J. Kub ; Karl D. Hobart, Electronic device with composite substrate.
    상세보기
  10. Boos J. Brad (Springfield VA) Kruppa Walter (Fairfax VA), Fabrication method for III-V heterostructure field-effect transistors.
    상세보기
  11. Chao, Pane-Chane; Ku, Walter H., Fabrication of metal lines for semiconductor devices.
    상세보기
  12. Mishra Umesh K. (Cary NC) Thompson Mark A. (Thousand Oaks CA) Jelloian Linda M. (Northridge CA), Fabrication of self-aligned, T-gate HEMT.
    상세보기
  13. Mizuta Masashi,JPX ; Kuzuhara Masaaki,JPX ; Nashimoto Yasunobu,JPX ; Asano Kazunori,JPX ; Miyoshi Yosuke,JPX ; Mochizuki Yasunori,JPX, Fet having non-overlapping field control electrode between gate and drain.
    상세보기
  14. Eastman Lester Fuess ; Shealy James Richard, Field effect semiconductor device having dipole barrier.
    상세보기
  15. Masashi Mizuta JP; Masaaki Kuzuhara JP; Yasunobu Nashimoto JP; Kazunori Asano JP; Yosuke Miyoshi JP; Yasunori Mochizuki JP, Field effect transistor.
    상세보기
  16. Peake, Steven T.; Grover, Raymond J., Field effect transistor structure and method of manufacture.
    상세보기
  17. Delagebeaudeuf Daniel (Paris FRX) Nuyen Tranc L. (Paris FRX), Field effect transistor with high cut-off frequency and process for forming same.
    상세보기
  18. Miller, Dain Curtis; Bahl, Inder J.; Griffin, Edward L., Field-plate MESFET.
    상세보기
  19. Inoue, Kaoru; Nishii, Katsunori; Masato, Hiroyuki, GaN-based HFET having a surface-leakage reducing cap layer.
    상세보기
  20. Vaudo Robert P. ; Redwing Joan M. ; Tischler Michael A. ; Brown Duncan W., GaN-based devices using (Ga, AL, In)N base layers.
    상세보기
  21. Vaudo, Robert P.; Redwing, Joan M.; Tischler, Michael A.; Brown, Duncan W.; Flynn, Jeffrey S., GaN-based devices using thick (Ga, Al, In)N base layers.
    상세보기
  22. Davis, Robert F.; Nam, Ok-Hyun, Gallium nitride semiconductor structure including laterally offset patterned layers.
    상세보기
  23. Linthicum, Kevin J.; Gehrke, Thomas; Davis, Robert F., Gallium nitride semiconductor structures fabricated by pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on weak posts.
    상세보기
  24. Davis Robert F. ; Nam Ok-Hyun,KRX ; Zheleva Tsvetanka ; Bremser Michael D., Gallium nitride semiconductor structures including a lateral gallium nitride layer that extends from an underlying gallium nitride layer.
    상세보기
  25. Davis, Robert F.; Nam, Ok-Hyun; Zheleva, Tsvetanka; Bremser, Michael D., Gallium nitride semiconductor structures including lateral gallium nitride layers.
    상세보기
  26. Wu, Yifeng; Zhang, Naiqing; Xu, Jian; Mc Carthy, Lee, Group III nitride based FETs and HEMTs with reduced trapping and method for producing the same.
    상세보기
  27. Chavarkar, Prashant; Smorchkova, Ioulia P.; Keller, Stacia; Mishra, Umesh; Walukiewicz, Wladyslaw; Wu, Yifeng, Group-III nitride based high electron mobility transistor (HEMT) with barrier/spacer layer.
    상세보기
  28. Riechert Henning,DEX ; Grave Thomas,DEX, HEMT double hetero structure.
    상세보기
  29. Nguyen Loi D. (Agoura Hills CA) Delaney Michael J. (Thousand Oaks CA) Larson Lawrence E. (Santa Monica CA) Mishra Umesh K. (Cary NC), Hemt structure with passivated donor layer.
    상세보기
  30. Hasegawa Yuuichi (Kawasaki JPX), Heterojunction FET with a high potential barrier layer and gate structure.
    상세보기
  31. Kawai Hiroji,JPX ; Imanaga Shunji,JPX ; Kobayashi Toshimasa,JPX, Heterojunction field effect transistor.
    상세보기
  32. Yuji Ando JP, Heterojunction field effect transistor.
    상세보기
  33. Carter ; Jr. Calvin H. (Raleigh NC), High efficiency light emitting diodes from bipolar gallium nitride.
    상세보기
  34. Mimura Takashi (Machida JPX), High electron mobility single heterojunction semiconductor devices.
    상세보기
  35. Khan Muhammed A. (White Bear Lake) VanHove James M. (Eagan) Kuznia Jon N. (Fridley) Olson Donald T. (Circle Pines MN), High electron mobility transistor with GaN/AlxGa1-xN heterojunctions.
    상세보기
  36. Thomas Gehrke ; Kevin J. Linthicum ; Robert F. Davis ; Darren B. Thomson, High temperature pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates.
    상세보기
  37. Ashida Tsutomu (Yamatokoriyama JPX) Nakagawa Kiyotoshi (Nara JPX) Fujii Katsumasa (Nara JPX) Torimaru Yasuo (Nara JPX), High voltage MOS transistor.
    상세보기
  38. Nagahara, Masaki, High-speed compound semiconductor device operable at large output power with minimum leakage current.
    상세보기
  39. Liu Chun-Ting (Berkeley Heights NJ), Integrated circuit fabrication.
    상세보기
  40. Schetzina Jan Frederick, Integrated heterostructures of group III-V nitride semiconductor materials including epitaxial ohmic contact comprising multiple quantum well.
    상세보기
  41. Quick, Nathaniel R., Laser synthesized wide-bandgap semiconductor electronic devices and circuits.
    상세보기
  42. Mark Simpson ; Theodore Letavic, Laterial thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode.
    상세보기
  43. Lipkin Lori A. ; Palmour John Williams, Layered dielectric on silicon carbide semiconductor structures.
    상세보기
  44. Cao, Densen, Light source using semiconductor devices mounted on a heat sink.
    상세보기
  45. Kim Dong-gyu,KRX ; Na Byoung-sun,KRX, Liquid crystal display device fabrication methods with reduced numbers of patterning steps.
    상세보기
  46. Edmond John A. (Cary NC) Bulman Gary E. (Cary NC) Kong Hua-Shuang (Raleigh NC), Low-strain laser structures with group III nitride active layers.
    상세보기
  47. Kunihiro Kazuaki,JPX, MESfield effect transistor.
    상세보기
  48. Stein Ren (Roettenbach DEX), Metal-insulator semiconductor field-effect transistor.
    상세보기
  49. John Bradley Boos, Metalization of electronic semiconductor devices.
    상세보기
  50. Cuomo, Jerome J.; Williams, N. Mark; Hanser, Andrew David; Carlson, Eric Porter; Thomas, Darin Taze, Method and apparatus for producing MIIIN columns and MIIIN materials grown thereon.
    상세보기
  51. Rudeck Paul J. ; Hurley Kelly T., Method and structure for an oxide layer overlaying an oxidation-resistant layer.
    상세보기
  52. Asano Kazunori (Tokyo JPX), Method for fabricating a field effect transistor.
    상세보기
  53. Woo, Lee Dae; Dae, Kim Jong, Method for fabricating an extended drain metal oxide semiconductor field effect transistor with a source field plate.
    상세보기
  54. Green, Bruce M.; Hartin, Olin L.; Klingbeil, Lawrence S.; Lan, Ellen Y.; Li, Hsin-Hua P.; Weitzel, Charles E., Method for forming a microwave field effect transistor with high operating voltage.
    상세보기
  55. Fiordalice Robert W. (Austin TX) Maniar Papu D. (Austin TX) Klein Jeffrey L. (Austin TX) Roman Bernard J. (Austin TX), Method for forming a plug and semiconductor device having the same.
    상세보기
  56. Wada Shigeki,JPX, Method for manufacturing modified T-shaped gate electrode.
    상세보기
  57. Matsuda Yoshio (Hyogo JPX) Fujishima Kazuyasu (Hyogo JPX), Method for manufacturing semiconductor memory device having improved resistance to a 상세보기
  • Konstantinov Andrei,SEX ; Janzen Erik,SEX, Method for producing a semiconductor device having a semiconductor layer of SiC.
    상세보기
  • Goesele Ulrich M. ; Tong Qin-Yi, Method for the transfer of thin layers monocrystalline material onto a desirable substrate.
    상세보기
  • Buer Kenneth Vern ; Corman David Warren, Method of designing unit FET cells with unconditional stability.
    상세보기
  • Shih Hung-Dah (Plano TX) Kim Bumman (Richardson TX), Method of forming heterostructure field effect transistor.
    상세보기
  • Kong Hua-Shuang (Raleigh NC) Carter ; Jr. Calvin H. (Cary NC), Method of improving mechanically prepared substrate surfaces of alpha silicon carbide for deposition of beta silicon car.
    상세보기
  • Khan Muhammad A. (White Bear Lake MN) VanHove James M. (Eagan MN) Kuznia Jon N. (Fridley MN) Olson Donald T. (Circle Pines MN), Method of making a high electron mobility transistor.
    상세보기
  • Kwon O-Kyong,KRX ; Jeong Hoon-Ho,KRX, Method of making high voltage metal oxide silicon field effect transistor.
    상세보기
  • Beetz ; Jr. Charles P. (New Milford CT), Method of making single crystal semiconductor substrate articles and semiconductor device.
    상세보기
  • Shanfield Stanley R. (West Newton MA) Patel Bharat (Nashua NH) Statz Hermann (Wayland MA), Method of manufacturing a III-V semiconductor device using a self-biased substrate and a plasma containing an electroneg.
    상세보기
  • Palmour John W. (Raleigh NC) Kong Hua-Shuang (Raleigh NC) Edmond John A. (Apex NC), Method of preparing silicon carbide surfaces for crystal growth.
    상세보기
  • Yamaguchi Takehisa (Hyogo JPX) Shimizu Masahiro (Hyogo JPX), Method of producing field effect transistor.
    상세보기
  • Ghyselen, Bruno; Letertre, Fabrice, Methods for fabricating final substrates.
    상세보기
  • Linthicum, Kevin J.; Gehrke, Thomas; Davis, Robert F.; Thomson, Darren B.; Tracy, Kieran M., Methods of fabricating gallium nitride microelectronic layers on silicon layers.
    상세보기
  • Linthicum Kevin J. ; Gehrke Thomas ; Davis Robert F. ; Thomson Darren B. ; Tracy Kieran M., Methods of fabricating gallium nitride microelectronic layers on silicon layers and gallium nitride microelectronic structures formed thereby.
    상세보기
  • Davis, Robert F.; Nam, Ok-Hyun; Zheleva, Tsvetanka; Bremser, Michael D., Methods of fabricating gallium nitride semiconductor layers by lateral overgrowth.
    상세보기
  • Linthicum, Kevin J.; Gehrke, Thomas; Davis, Robert F., Methods of fabricating gallium nitride semiconductor layers on substrates including non-gallium nitride posts, and gallium nitride semiconductor structures fabricated thereby.
    상세보기
  • Mueller, Stephan, Methods of fabricating silicon carbide crystals.
    상세보기
  • Gehrke Thomas ; Linthicum Kevin J. ; Davis Robert F., Methods of forming a plurality of semiconductor layers using spaced trench arrays.
    상세보기
  • Thomas Gehrke ; Kevin J. Linthicum ; Robert F. Davis, Methods of forming compound semiconductor layers using spaced trench arrays and semiconductor substrates formed thereby.
    상세보기
  • Dreifus David L. ; Malta Dean M., Microelectronic structures including semiconductor islands.
    상세보기
  • Sheppard Scott Thomas ; Allen Scott Thomas ; Palmour John Williams, Nitride based transistors on semi-insulating silicon carbide substrates.
    상세보기
  • Sheppard, Scott Thomas; Allen, Scott Thomas; Palmour, John Williams, Nitride based transistors on semi-insulating silicon carbide substrates.
    상세보기
  • Sheppard,Scott T.; Smith,Richard Peter; Ring,Zoltan, Nitride-based transistors with a protective layer and a low-damage recess and methods of fabrication thereof.
    상세보기
  • Teraguchi Nobuaki,JPX ; Suzuki Akira,JPX, Nitride-type III-V HEMT having an InN 2DEG channel layer.
    상세보기
  • Furuhata, Tomoyuki; Yamazaki, Atsushi, Non-volatile semiconductor memory devices.
    상세보기
  • Kevin J. Linthicum ; Thomas Gehrke ; Darren B. Thomson ; Eric P. Carlson ; Pradeep Rajagopal ; Robert F. Davis, PENDEOEPITAXIAL METHODS OF FABRICATING GALLIUM NITRIDE SEMICONDUCTOR LAYERS ON SILICON CARBIDE SUBSTRATES BY LATERAL GROWTH FROM SIDEWALLS OF MASKED POSTS, AND GALLIUM NITRIDE SEMICONDUCTOR STRUCTURE.
    상세보기
  • Wojtowicz, Michael; Chin, Tsung-Pei; Barsky, Michael E.; Grundbacher, Ronald W., Partially relaxed channel HEMT device.
    상세보기
  • Schmitz, Adele E.; Brown, Julia J., Passivation layer and process for semiconductor devices.
    상세보기
  • Linthicum Kevin J. ; Gehrke Thomas ; Thomson Darren B. ; Carlson Eric P. ; Rajagopal Pradeep ; Davis Robert F., Pendeoepitaxial gallium nitride semiconductor layers on silcon carbide substrates.
    상세보기
  • Kevin J. Linthicum ; Thomas Gehrke ; Darren B. Thomson ; Eric P. Carlson ; Pradeep Rajagopal ; Robert F. Davis, Pendeoepitaxial gallium nitride semiconductor layers on silicon carbide substrates.
    상세보기
  • Gehrke, Thomas; Linthicum, Kevin J.; Davis, Robert F., Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates.
    상세보기
  • Gehrke, Thomas; Linthicum, Kevin J.; Davis, Robert F., Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates, and gallium nitride semiconductor structures fabricated thereby.
    상세보기
  • Gehrke, Thomas; Linthicum, Kevin J.; Davis, Robert F., Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates, and gallium nitride semiconductor structures fabricated thereby.
    상세보기
  • Kevin J. Linthicum ; Thomas Gehrke ; Robert F. Davis, Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on weak posts, and gallium nitride semiconductor structures fabricated thereby.
    상세보기
  • Saito,Wataru; Omura,Ichiro, Power semiconductor device.
    상세보기
  • Chung Hsien-Ta,TWX ; Yang Chan-Lon,TWX ; Chen Tong-Yu,TWX ; Yew Tri-Rung,TWX, Process for low k organic dielectric film etch.
    상세보기
  • Beaubien Randall S. (Westlake Village CA) Erps Lorri A. (Pleasanton CA), Process for making a T-gated transistor.
    상세보기
  • Molnar Richard J., Process for producing high-quality III-V nitride substrates.
    상세보기
  • Cao, Yanxiang; Lockhart, David J.; Mei, Rui; Su, Xing, Proportional amplification of nucleic acids.
    상세보기
  • Lin,Da Wen; Sheu,Yi Ming; Leung,Ying Keung, Recessed gate structure with reduced current leakage and overlap capacitance.
    상세보기
  • John Petruzzello ; Theodore James Letavic ; Mark Simpson, SOI LDMOS structure with improved switching characteristics.
    상세보기
  • Allen Scott T. (Morrisville NC), Self-aligned field-effect transistor for high frequency applications.
    상세보기
  • Carter ; Jr. Calvin H. ; Brady Mark ; Tsvetkov Valeri F., Semi-insulating silicon carbide without vanadium domination.
    상세보기
  • Kensuke Kasahara JP; Yasuo Ohno JP; Masaaki Kuzuhara JP; Hironobu Miyamoto JP; Yuji Ando JP; Tatsuo Nakayama JP; Kazuaki Kunihiro JP; Nobuyuki Hayama JP; Yuji Takahashi JP; Kouji Matsunaga , Semiconductor device.
    상세보기
  • Kunii Tetsuo,JPX ; Yoshida Naohito,JPX, Semiconductor device.
    상세보기
  • Yokoyama, Mitsunori; Nagahara, Masaki, Semiconductor device and method of fabricating the same.
    상세보기
  • Usagawa Toshiyuki (Koganei JPX) Imamura Yoshinori (Kanagawa JPX) Okuhira Hidekazu (Hachiouji JPX) Goto Shigeo (Kokubunji JPX) Kobayashi Masayoshi (Hachiouji JPX) Takatani Shinichiro (Kokubunji JPX), Semiconductor device and method of producing the same.
    상세보기
  • Hattori Ryo (Itami JPX) Kohno ; deceased Yasutaka (late of Saijyo JPX by Yoko Kohno ; legal representative ) Kunii Tetsuro (Itami JPX), Semiconductor device electrode.
    상세보기
  • Matsumoto Hidetoshi (Kodaira JPX) Yazawa Masamitsu (Yokohama JPX) Hiruma Kenji (Tokorozawa JPX), Semiconductor device having first and second stacked semiconductor layers, with electrical contact to the first semicond.
    상세보기
  • Akiyama Hajime,JPX ; Tarui Yoichiro,JPX, Semiconductor device having lateral high breakdown voltage element.
    상세보기
  • Lebby Michael S. (Apache Junction AZ) Shieh Chan-Long (Paradise Valley AZ) Davis Ken (Tempe AZ), Semiconductor device with high heat conductivity.
    상세보기
  • Tatsuo Nakayama JP; Yuji Ando JP; Hironobu Miyamoto JP; Kazuaki Kunihiro JP; Yuji Takahashi JP; Kensuke Kasahara JP; Nobuyuki Hayama JP; Yasuo Ohno JP; Kouji Matsunaga JP; Masaaki Kuzuhara , Semiconductor device with schottky electrode having high schottky barrier.
    상세보기
  • Yamaguchi, Masakazu; Saito, Wataru; Omura, Ichiro; Izumisawa, Masaru, Semiconductor device with super junction region.
    상세보기
  • Yamamoto Yoshiyuki,JPX ; Imai Takahiro,JPX, Semiconductor mounting package.
    상세보기
  • Weitzel Charles E. (Mesa AZ) Bhatnagar Mohit (Mesa AZ), Silicon carbide MOSFET.
    상세보기
  • Weitzel Charles E. ; Moore Karen E. ; Davis Kenneth L., Silicon carbide transistor and method.
    상세보기
  • Jenoe Tihanyi DE, Silicon on insulator high-voltage switch.
    상세보기
  • Beetz ; Jr. Charles P. (New Milford CT), Single crystal semiconductor substrate articles and semiconductor devices comprising same.
    상세보기
  • Kong, Hua-Shuang; Edmond, John Adam; Haberern, Kevin Ward; Emerson, David Todd, Single step pendeo-and lateral epitaxial overgrowth of group III-nitride epitaxial layers with group III-nitride buffer layer and resulting structures.
    상세보기
  • Saxler,Adam William, Strain balanced nitride heterojunction transistors.
    상세보기
  • Kneissl, Michael A.; Bour, David P.; Mei, Ping; Romano, Linda T., Structure for nitride based laser diode with growth substrate removed.
    상세보기
  • Stoneham Edward B. (Los Altos CA) Omori Masahiro (Palo Alto CA) Herbig Arthur D. (San Jose CA), Subchannel doping to reduce short-gate effects in field effect transistors.
    상세보기
  • Davis Robert F. (Raleigh NC) Carter ; Jr. Calvin H. (Raleigh NC) Hunter Charles E. (Durham NC), Sublimation of silicon carbide to produce large, device quality single crystals of silicon carbide.
    상세보기
  • Marina Plat ; Christopher F. Lyons ; Bhanwar Singh ; Ramkumar Subramanian, T or T/Y gate formation using trim etch processing.
    상세보기
  • Stephen O'Brien ; Julian S. Osinski, Thermally conductive coatings for light emitting devices.
    상세보기
  • Imai Takahiro (Itami JPX) Fujimori Naoji (Itami JPX) Nakahata Hideaki (Itami JPX), Thin film single crystal substrate.
    상세보기
  • Huang,Kun Ming; Hsu,Cheng Fu, Thin film transistor (TFT) device structure employing silicon rich silicon oxide passivation layer.
    상세보기
  • Goodman Alvin M. (Arlington VA) Yoder Max N. (Falls Church VA), Trenched bipolar transistor structures.
    상세보기
  • Baba Toshio,JPX ; Uemura Tetsuya,JPX, Tunnel transistor and method of manufacturing same.
    상세보기
  • McNulty, Thomas Francis; Doxsee, Daniel Darcy; Rose, James Wilson, UV reflectors and UV-based light sources having reduced UV radiation leakage incorporating the same.
    상세보기
  • Degenhardt Charles R. (The Procter & Gamble Company ; Miami Valley Laboratories ; P.O. Box 398707 Cincinnati OH 45239-8707) Kozikowski Barbara A. (The Procter & Gamble Company ; Miami Valley Laborato, Use of a carboxy-substituted polymer to inhibit plaque formation without tooth staining.
    상세보기
  • Cheng Chu-Liang (Piscataway NJ), Vertical Enhancement-mode Group III-V compound MISFETs.
    상세보기
  • Edmond John A. (Cary NC) Bulman Gary E. (Cary NC) Kong Hua-Shuang (Raleigh NC) Dmitriev Vladimir (Fuquay-Varina NC), Vertical geometry light emitting diode with group III nitride active layer and extended lifetime.
    상세보기

    • 이 특허를 인용한 특허 (71) 인용/피인용 타임라인 분석

    1. Briere, Michael A., Active area shaping of III-nitride devices utilizing a field plate defined by a dielectric body.
      상세보기
    2. Briere, Michael A., Active area shaping of III-nitride devices utilizing a source-side field plate and a wider drain-side field plate.
      상세보기
    3. Briere, Michael A., Active area shaping of III-nitride devices utilizing multiple dielectric materials.
      상세보기
    4. Briere, Michael A., Active area shaping of III-nitride devices utilizing steps of source-side and drain-side field plates.
      상세보기
    5. Keller, Stacia; Swenson, Brian L.; Fichtenbaum, Nicholas, Buffer layer structures suited for III-nitride devices with foreign substrates.
      상세보기
    6. Keller, Stacia; Swenson, Brian L.; Fichtenbaum, Nicholas, Buffer layer structures suited for III-nitride devices with foreign substrates.
      상세보기
    7. Keller, Stacia; Swenson, Brian L.; Fichtenbaum, Nicholas, Carbon doping semiconductor devices.
      상세보기
    8. Keller, Stacia; Swenson, Brian L.; Fichtenbaum, Nicholas, Carbon doping semiconductor devices.
      상세보기
    9. Keller, Stacia; Swenson, Brian L.; Fichtenbaum, Nicholas, Carbon doping semiconductor devices.
      상세보기
    10. Makiyama, Kozo; Okamoto, Naoya; Ohki, Toshihiro; Minoura, Yuichi; Ozaki, Shirou; Miyajima, Toyoo, Compound semiconductor device and manufacturing method therefor.
      상세보기
    11. Makiyama, Kozo; Okamoto, Naoya; Ohki, Toshihiro; Minoura, Yuichi; Ozaki, Shirou; Miyajima, Toyoo, Compound semiconductor device and manufacturing method therefor.
      상세보기
    12. Dora, Yuvaraj; Wu, Yifeng, Electrode configurations for semiconductor devices.
      상세보기
    13. Dora, Yuvaraj; Wu, Yifeng, Electrode configurations for semiconductor devices.
      상세보기
    14. Chowdhury, Srabanti; Mishra, Umesh; Dora, Yuvaraj, Electrodes for semiconductor devices and methods of forming the same.
      상세보기
    15. Chowdhury, Srabanti; Mishra, Umesh; Dora, Yuvaraj, Electrodes for semiconductor devices and methods of forming the same.
      상세보기
    16. Mishra, Umesh; Coffie, Robert; Shen, Likun; Ben-Yaacov, Ilan; Parikh, Primit, Enhancement mode III-N HEMTs.
      상세보기
    17. Mishra, Umesh; Coffie, Robert; Shen, Likun; Ben-Yaacov, Ilan; Parikh, Primit, Enhancement mode III-N HEMTs.
      상세보기
    18. Mishra, Umesh; Coffie, Robert; Shen, Likun; Ben-Yaacov, Ilan; Parikh, Primit, Enhancement mode III-N HEMTs.
      상세보기
    19. Mishra, Umesh; Coffie, Robert; Shen, Likun; Ben-Yaacov, Ilan; Parikh, Primit, Enhancement mode III-N HEMTs.
      상세보기
    20. Mishra, Umesh; Coffie, Robert; Shen, Likun; Ben-Yaacov, Ilan; Parikh, Primit, Enhancement mode III-N HEMTs.
      상세보기
    21. Lal, Rakesh K., Enhancement-mode III-nitride devices.
      상세보기
    22. Lal, Rakesh K., Enhancement-mode III-nitride devices.
      상세보기
    23. Wu, Mo; Lal, Rakesh K.; Ben-Yaacov, Ilan; Mishra, Umesh; Neufeld, Carl Joseph, Forming enhancement mode III-nitride devices.
      상세보기
    24. Wu, Mo; Lal, Rakesh K.; Ben-Yaacov, Ilan; Mishra, Umesh; Neufeld, Carl Joseph, Forming enhancement mode III-nitride devices.
      상세보기
    25. Ogino, Tsutomu, Gate structures for III-N devices.
      상세보기
    26. Takemae, Yoshihiro; Hosoda, Tsutomu; Sato, Toshiya, High electron mobility transistor circuit.
      상세보기
    27. Lal, Rakesh K.; Coffie, Robert; Wu, Yifeng; Parikh, Primit; Dora, Yuvaraj; Mishra, Umesh; Chowdhury, Srabanti; Fichtenbaum, Nicholas, High power semiconductor electronic components with increased reliability.
      상세보기
    28. Mishra, Umesh; McCarthy, Lee; Fichtenbaum, Nicholas, High voltage III-nitride semiconductor devices.
      상세보기
    29. Mishra, Umesh; McCarthy, Lee; Fichtenbaum, Nicholas, High voltage III-nitride semiconductor devices.
      상세보기
    30. Shibib, Ayman; Terrill, Kyle, High-electron-mobility transistor devices.
      상세보기
    31. Parikh, Primit; Dora, Yuvaraj; Wu, Yifeng; Mishra, Umesh; Fichtenbaum, Nicholas; Lal, Rakesh K., III-N device structures and methods.
      상세보기
    32. Parikh, Primit; Dora, Yuvaraj; Wu, Yifeng; Mishra, Umesh; Fichtenbaum, Nicholas; Lal, Rakesh K., III-N device structures and methods.
      상세보기
    33. Parikh, Primit; Dora, Yuvaraj; Wu, Yifeng; Mishra, Umesh; Fichtenbaum, Nicholas; Lal, Rakesh K., III-N device structures and methods.
      상세보기
    34. Fichtenbaum, Nicholas; McCarthy, Lee; Wu, Yifeng, III-N device structures having a non-insulating substrate.
      상세보기
    35. Mishra, Umesh; Lal, Rakesh K.; Keller, Stacia; Chowdhury, Srabanti, III-Nitride transistor including a III-N depleting layer.
      상세보기
    36. Mishra, Umesh; Lal, Rakesh K.; Gupta, Geetak; Neufeld, Carl Joseph; Rhodes, David, III-nitride devices including a graded depleting layer.
      상세보기
    37. Briere, Michael A.; Bridger, Paul; Cao, Jianjun, III-nitride semiconductor device with stepped gate.
      상세보기
    38. Mishra, Umesh; Lal, Rakesh K.; Keller, Stacia; Chowdhury, Srabanti, III-nitride transistor including a p-type depleting layer.
      상세보기
    39. Mishra, Umesh; Lal, Rakesh K.; Keller, Stacia; Chowdhury, Srabanti, III-nitride transistor including a p-type depleting layer.
      상세보기
    40. Honea, James; Wu, Yifeng, Inductive load power switching circuits.
      상세보기
    41. Honea, James; Wu, Yifeng, Inductive load power switching circuits.
      상세보기
    42. Honea, James; Wu, Yifeng, Inductive load power switching circuits.
      상세보기
    43. Honea, James; Wu, Yifeng, Inductive load power switching circuits.
      상세보기
    44. Honea, James; Wu, Yifeng, Inductive load power switching circuits.
      상세보기
    45. Dora, Yuvaraj, Method for making semiconductor diodes with low reverse bias currents.
      상세보기
    46. Lal, Rakesh K.; Coffie, Robert; Wu, Yifeng; Parikh, Primit; Dora, Yuvaraj; Mishra, Umesh; Chowdhury, Srabanti; Fichtenbaum, Nicholas, Method of forming electronic components with increased reliability.
      상세보기
    47. Lal, Rakesh K.; Coffie, Robert; Wu, Yifeng; Parikh, Primit; Dora, Yuvaraj; Mishra, Umesh; Chowdhury, Srabanti; Fichtenbaum, Nicholas, Method of forming electronic components with increased reliability.
      상세보기
    48. Chu, Rongming; Mishra, Umesh; Lal, Rakesh K., Methods of forming reverse side engineered III-nitride devices.
      상세보기
    49. Chu, Rongming; Mishra, Umesh; Lal, Rakesh K., Methods of forming reverse side engineered III-nitride devices.
      상세보기
    50. Mishra, Umesh; Chowdhury, Srabanti; Neufeld, Carl Joseph, N-polar III-nitride transistors.
      상세보기
    51. Mishra, Umesh; Chowdhury, Srabanti; Neufeld, Carl Joseph, N-polar III-nitride transistors.
      상세보기
    52. Kikkawa, Toshihide; Kiuchi, Kenji; Hosoda, Tsutomu; Kanamura, Masahito; Mochizuki, Akitoshi, Recessed ohmic contacts in a III-N device.
      상세보기
    53. Chu, Rongming; Mishra, Umesh; Lal, Rakesh K., Reverse side engineered III-nitride devices.
      상세보기
    54. Takada, Yoshiharu, Semiconductor device and method of manufacturing the same.
      상세보기
    55. Chu, Rongming; Coffie, Robert, Semiconductor devices with field plates.
      상세보기
    56. Chu, Rongming; Coffie, Robert, Semiconductor devices with field plates.
      상세보기
    57. Chu, Rongming; Coffie, Robert, Semiconductor devices with field plates.
      상세보기
    58. Chu, Rongming; Coffie, Robert, Semiconductor devices with field plates.
      상세보기
    59. Chu, Rongming; Coffie, Robert, Semiconductor devices with field plates.
      상세보기
    60. Chu, Rongming; Coffie, Robert, Semiconductor devices with field plates.
      상세보기
    61. Mishra, Umesh; Chowdhury, Srabanti; Dora, Yuvaraj, Semiconductor devices with guard rings.
      상세보기
    62. Mishra, Umesh; Chowdhury, Srabanti; Dora, Yuvaraj, Semiconductor devices with guard rings.
      상세보기
    63. Mishra, Umesh; Chowdhury, Srabanti; Ben-Yaacov, Ilan, Semiconductor devices with integrated hole collectors.
      상세보기
    64. Mishra, Umesh; Chowdhury, Srabanti; Ben-Yaacov, Ilan, Semiconductor devices with integrated hole collectors.
      상세보기
    65. Dora, Yuvaraj, Semiconductor diodes with low reverse bias currents.
      상세보기
    66. Wu, Yifeng; Chu, Rongming; Parikh, Primit; Mishra, Umesh; Ben-Yaacov, Ilan; Shen, Likun, Semiconductor heterostructure diodes.
      상세보기
    67. Wu, Yifeng; Mishra, Umesh; Parikh, Primit; Ben-Yaacov, Ilan, Semiconductor heterostructure diodes.
      상세보기
    68. Wu, Yifeng; Mishra, Umesh; Parikh, Primit; Chu, Rongming; Ben-Yaacov, Ilan; Shen, Likun, Semiconductor heterostructure diodes.
      상세보기
    69. Mishra, Umesh; Chowdhury, Srabanti, Transistors with isolation regions.
      상세보기
    70. Mishra, Umesh; Chowdhury, Srabanti, Transistors with isolation regions.
      상세보기
    71. Mishra, Umesh; Chowdhury, Srabanti, Transistors with isolation regions.
      상세보기

    활용도 분석정보

    상세보기
    다운로드
    내보내기

    활용도 Top5 특허

    해당 특허가 속한 카테고리에서 활용도가 높은 상위 5개 콘텐츠를 보여줍니다.
    더보기 버튼을 클릭하시면 더 많은 관련자료를 살펴볼 수 있습니다.

    관련 콘텐츠

    저작권 관리 안내

    문의처: helpdesk@kisti.re.kr전화: 080-969-4114

    Copyright KISTI. All Rights Reserved.

    AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

    AI-Helper 아이콘
    AI-Helper
    안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
    ※ AI-Helper는 부적절한 답변을 할 수 있습니다.

    선택된 텍스트

    맨위로