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Kafe 바로가기국가/구분 | United States(US) Patent 등록 |
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국제특허분류(IPC7판) |
|
출원번호 | US-0371040 (2009-02-13) |
등록번호 | US8058899 (2011-11-01) |
우선권정보 | DE-2001-01 10 530(2001-03-05) |
발명자 / 주소 |
|
대리인 / 주소 |
|
인용정보 | 피인용 횟수 : 1 인용 특허 : 524 |
A logic cell array having a number of logic cells and a segmented bus system for logic cell communication, the bus system including different segment lines having shorter and longer segments for connecting two points in order to be able to minimize the number of bus elements traversed between separa
A logic cell array having a number of logic cells and a segmented bus system for logic cell communication, the bus system including different segment lines having shorter and longer segments for connecting two points in order to be able to minimize the number of bus elements traversed between separate communication start and end points.
What is claimed: 1. A configurable computing processor chip comprising:configurable elements for configurably processing data, the configurable elements being arranged in an array and being interconnected via a configurable interconnect system, the array comprising:a plurality of programmable gate a
What is claimed: 1. A configurable computing processor chip comprising:configurable elements for configurably processing data, the configurable elements being arranged in an array and being interconnected via a configurable interconnect system, the array comprising:a plurality of programmable gate array (PGA) elements;a plurality of dedicated multi-bit ALU elements each having at least one multi-bit adder and one multi-bit multiplier and being configurable in function; anda plurality of multi-bit configurable RAM elements, wherein the RAM elements receive data and address information from the configurable interconnect system and send output data directly to the configurable interconnect system; andat least one configurable multi-bit IO function unit communicatively coupled to the array.
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