IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
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출원번호 |
US-0249474
(2008-10-10)
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등록번호 |
US-8132082
(2012-03-06)
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발명자
/ 주소 |
- Au, Siu-Hung Fred
- Burd, Gregory
- Wu, Zining
- Xu, Jun
- Kikuchi, Ichiro
- Yoon, Tony
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출원인 / 주소 |
- Marvell International Ltd.
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인용정보 |
피인용 횟수 :
1 인용 특허 :
17 |
초록
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Systems and methods are provided for implementing various aspects of a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. If the decision-codeword corresponds to an inner code and an RS
Systems and methods are provided for implementing various aspects of a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. If the decision-codeword corresponds to an inner code and an RS code is the outer code, a soft-information map can process the soft-information for the decision-codeword to produce soft-information for a RS decision-codeword. A RS decoder can employ the Berlekamp-Massey algorithm (BMA), list decoding, and a Chien search, and can include a pipelined architecture. A threshold-based control circuit can be used to predict whether list decoding will be needed and can suspend the list decoding operation if it predicts that list decoding is not needed.
대표청구항
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1. A Reed-Solomon decoder for producing a k-symbol dataword based on an n-symbol decision-codeword, the system comprising: a first decoder component for producing a first error indicator based on a decision-codeword;a control circuit for making a prediction, on whether the first error indicator is v
1. A Reed-Solomon decoder for producing a k-symbol dataword based on an n-symbol decision-codeword, the system comprising: a first decoder component for producing a first error indicator based on a decision-codeword;a control circuit for making a prediction, on whether the first error indicator is valid, based on a threshold value; anda second decoder component for producing at least one second error indicator associated with the decision-codeword based on the prediction. 2. The Reed-Solomon decoder of claim 1, further comprising: a soft-information component that contains soft-information associated with the decision-codeword,wherein the second decoder component produces the at least one second error indicator based on the soft-information. 3. The Reed-Solomon decoder of claim 2, wherein if the control circuit predicts that the first error indicator is valid, the control circuit halts the second decoder component from producing the at least one second error indicator. 4. The Reed-Solomon decoder of claim 1, wherein the first error indicator and the at least one second error indicator are error locator polynomials. 5. The Reed-Solomon decoder of claim 1, wherein the second decoder component produces the at least one second error indicator using at least one of: list decoding, iterative decoding, and the BMA algorithm. 6. The Reed-Solomon decoder of claim 1, wherein the first error indicator corresponds to a polynomial of degree d. 7. The Reed-Solomon decoder of claim 6, wherein the control circuit predicts that the first error indicator is valid if d is less than or equal to (t−threshold value), where t=(n−k)/2. 8. The Reed-Solomon decoder of claim 1, further comprising a Chien search component for determining a validity of at least one error indicator from: the first error indicator and the at least one second error indicator. 9. A read path comprising the RS decoder of claim 1. 10. A disk drive comprising the read path of claim 9. 11. A Reed-Solomon decoder for producing a k-symbol dataword based on an n-symbol decision-codeword, the system comprising: a control circuit for making a prediction, on whether an error indicator is valid, based on a threshold value;a pipelined architecture having a plurality of pipeline stages, the pipelined architecture comprising at least: a first stage for producing a first-stage error indicator based on a decision-codeword, the first stage being in communication with the control circuit for the control circuit to make a first prediction on whether the first-stage error indicator is valid, anda second stage for producing at least one second-stage error indicator based on the first prediction, where the second stage is later than the first stage in the pipelined architecture. 12. The Reed-Solomon decoder of claim 11, further comprising: a soft-information component that contains soft-information associated with the decision-codeword,wherein the second stage produces the at least one second-stage error indicator based on the soft-information. 13. The Reed-Solomon decoder of claim 12, wherein if the control circuit predicts that the first-stage error indicator is valid, the control circuit halts the second stage from producing the at least one second-stage error indicator. 14. The Reed-Solomon decoder of claim 11, wherein the first error indicator and the at least one second error indicator are error locator polynomials. 15. The Reed-Solomon decoder of claim 11, wherein the second stage produces the at least one second-stage error indicator using at least one of: list decoding, iterative decoding, and the BMA algorithm. 16. The Reed-Solomon decoder of claim 11, wherein the first-stage error indicator corresponds to a polynomial of degree d. 17. The Reed-Solomon decoder of claim 16, wherein the control circuit predicts that the first error indicator is valid if d is less than or equal to (t−threshold value). 18. The Reed-Solomon detector of claim 11, wherein the pipelined architecture further comprises a third stage for determining a validity of at least one error indicator from: the first-stage error indicator and the at least one second-stage error indicator. 19. A read path comprising the RS decoder of claim 11. 20. A disk drive comprising the read path of claim 19.
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