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A phase-change memory device including a first contact region and a second contact region formed on a semiconductor substrate. A first insulating layer with a first contact hole and a second contact hole is disposed on the semiconductor substrate, exposing the first and second contact regions. A fir

A phase-change memory device including a first contact region and a second contact region formed on a semiconductor substrate. A first insulating layer with a first contact hole and a second contact hole is disposed on the semiconductor substrate, exposing the first and second contact regions. A first conductive layer is disposed on the first insulating interlayer to fill the first and the second contact holes. A first protection layer pattern and a lower wiring protection pattern are disposed on the first conductive layer. A first contact with a first electrode and a second contact with a lower wiring are disposed so as to connect the first and second contact regions. A second protection layer with a second electrode is disposed on the first protection layer pattern and the lower wiring protection pattern. A via filled with a phase-change material is disposed between the first electrode and the second electrode.

대표청구항 ▼

1. A phase-change memory device comprising: a first contact region and a second contact region on a semiconductor substrate;a first insulating interlayer on the semiconductor substrate;a first contact hole and a second contact hole disposed in the first insulating interlayer so as to expose the firs

1. A phase-change memory device comprising: a first contact region and a second contact region on a semiconductor substrate;a first insulating interlayer on the semiconductor substrate;a first contact hole and a second contact hole disposed in the first insulating interlayer so as to expose the first and second contact regions;a first contact and a second contact, wherein the first and the second contacts fill the first contact hole and the second contact hole, respectively, and are disposed so as to connect to the first and second contact regions;a first electrode and a lower wiring, wherein the first electrode and the lower wiring are in contact with the first and second contacts, respectively, and on the first insulating interlayer;a first protection layer pattern and a lower wiring protection pattern in contact with the first electrode and the lower wiring, respectively, the first protection layer pattern and the lower wiring protection pattern being separate from the first electrode and the lower wiring, respectively;a second protection layer in contact with the first protection layer pattern and the lower wiring protection pattern;a second electrode in contact with the second protection layer; anda via filled with a phase-change material disposed between the first electrode and the second electrode,wherein the first contact and the first electrode are integrally formed, and the second contact and the lower wiring are integrally formed. 2. The device of claim 1, wherein the substrate comprises a silicon wafer, a silicon-on-insulator substrate or a single-crystalline metal-oxide substrate. 3. The device of claim 1, wherein the first insulating layer comprises phosphor silicate glass, boro-phosphor silicate glass, undoped silicate glass, spin-on-glass, tetraethyl orthosilicate (TEOS), plasma-enhanced TEOS, flowable oxide, high-density plasma chemical vapor deposition oxide, or silicon nitride. 4. The device of claim 1, further comprising a lower structure including a plurality of transistors disposed on the semiconductor substrate. 5. The device of claim 4, wherein the first insulation layer has a sufficient thickness to substantially completely cover the lower structure. 6. The device of claim 1, wherein the second electrode comprises polysilicon doped with impurities, a metal, or a conductive metal nitride. 7. The device of claim 1, wherein the first protection layer pattern comprises nitride or oxynitride. 8. The device of claim 1, wherein the phase-change material comprises a chalcogenide compound. 9. The device of claim 1, further comprising a second insulating layer surrounded by the first protection layer pattern and the second protection layer. 10. The device of claim 9, wherein the second insulating layer comprises phosphor silicate glass, boro-phosphor silicate glass, undoped silicate glass, spin-on-glass, tetraethyl orthosilicate (TEOS), plasma-enhanced TEOS, flowable oxide, or high-density plasma chemical vapor deposition oxide. 11. The device of claim 1, further comprising a spacer disposed between the first protection layer pattern and the phase-change material.