IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0240088
(2008-09-29)
|
등록번호 |
US-8203488
(2012-06-19)
|
발명자
/ 주소 |
- Soler Castany, Jordi
- Anguera Pros, Jaume
- Puente Baliarda, Carles
- Borja Borau, Carmen
|
출원인 / 주소 |
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
6 인용 특허 :
48 |
초록
▼
The present invention relates to an integrated circuit package comprising at least one substrate, each substrate including at least one layer, at least one semiconductor die, at least one terminal, and an antenna located in the integrated circuit package, but not on said at least one semiconductor d
The present invention relates to an integrated circuit package comprising at least one substrate, each substrate including at least one layer, at least one semiconductor die, at least one terminal, and an antenna located in the integrated circuit package, but not on said at least one semiconductor die. The conducting pattern comprises a curve having at least five sections or segments, at least three of the sections or segments being shorter than one-tenth of the longest free-space operating wavelength of the antenna, each of the five sections or segments forming a pair of angles with each adjacent segment or section, wherein the smaller angle of each of the four pairs of angles between sections or segments is less than 180° (i.e., no pair of sections or segments define a longer straight segment), wherein at least two of the angles are less than 115°, wherein at least two of the angles are not equal, and wherein the curve fits inside a rectangular area the longest edge of which is shorter than one-fifth of the longest free-space operating wavelength of the antenna.
대표청구항
▼
1. An integrated circuit package comprising: a package housing having a major surface;a semiconductor die disposed in a first area of the package housing; andan antenna disposed in a second area of the package housing separate from the first area and coupled to the semiconductor die, the antenna com
1. An integrated circuit package comprising: a package housing having a major surface;a semiconductor die disposed in a first area of the package housing; andan antenna disposed in a second area of the package housing separate from the first area and coupled to the semiconductor die, the antenna comprising a plurality of conducting segments that form a curve, the segments connected to each other at their ends forming angles different than 180 degrees,wherein at least two connections have angles less than 115 degrees, andwherein the curve comprises a first pair of segments forming a turn in a clockwise direction and a second pair of segments forming a turn in a counter-clockwise direction. 2. The integrated circuit package of claim 1, wherein the segments are shorter than one-tenth of a longest free-space operating wavelength of the antenna. 3. The integrated circuit package of claim 1, wherein the second area is a rectangular area having a longest side shorter than one-fifth of a longest free-space operating wavelength of the antenna. 4. The integrated circuit package of claim 1, wherein the antenna is a monopole antenna. 5. The integrated circuit package of claim 1, wherein the antenna is a dipole antenna. 6. The integrated circuit package of claim 5, wherein the dipole antenna comprises a close proximity region where a minimum distance between conducting segments is less than one-tenth of a longest free-space operating wavelength of the antenna. 7. The integrated circuit package of claim 1, wherein the antenna is a slot antenna. 8. The integrated circuit package of claim 1, wherein the antenna is an aperture antenna. 9. The integrated circuit package of claim 1, wherein the antenna is a multi-branch antenna. 10. The integrated circuit package of claim 1, wherein the antenna is a loop antenna. 11. The integrated circuit package of claim 1, wherein the antenna is an inverted F antenna. 12. The integrated circuit package of claim 1, further comprises a second antenna disposed in the second area of the package housing. 13. The integrated circuit package of claim 1, wherein the curve is a space filling curve. 14. The integrated circuit package of claim 1, wherein at least one connection forms a 90 degree angle. 15. The integrated circuit package of claim 14, wherein all connections form 90 degree angles. 16. An integrated circuit package comprising: a substrate having first and second side opposed sides; andan antenna pattern formed on the first side of the substrate, the antenna pattern comprising a plurality of conducting segments that form a curve, the segments connected to each other at their ends where any two adjacent connected segments do not form a longer segment,wherein at least two connections have angles less than 115 degrees, and a first angle smaller than 115 degrees and a second angle smaller than 115 degrees are defined on opposite sides of the curve, andwherein the second side of the substrate has non-conducting material for at least 50% of an area below the antenna pattern. 17. The integrated circuit package of claim 16, wherein the segments are shorter than one-tenth of a longest free-space operating wavelength of the antenna. 18. The integrated circuit package of claim 16, wherein the antenna is disposed in a rectangular area having a longest side shorter than one-fifth of a longest free-space operating wavelength of the antenna. 19. The integrated circuit package of claim 16, further comprises a second substrate coupled to the substrate, the second substrate comprising at least one electrical component. 20. The integrated circuit package of claim 19, wherein the second substrate has non-conducting material for at least 50% of an area overlapping the antenna pattern on the first substrate. 21. The integrated circuit package of claim 19, wherein the second substrate has no conducting material on an area overlapping the antenna pattern on the first substrate. 22. The integrated circuit package of claim 16, further comprises a semiconductor die disposed on the first side of the substrate, the semiconductor die being separate from the antenna pattern. 23. The integrated circuit package of claim 22, further comprises at least one electrical connector coupling the semiconductor die and at least one package terminal. 24. The integrated circuit package of claim 23, wherein the at least one package terminal is disposed on the second side of the substrate in the area below the antenna pattern. 25. The integrated circuit package of claim 23, wherein the at least one package terminal is disposed on the second side of the substrate in an area not below the antenna pattern. 26. The integrated circuit package of claim 23, wherein the at least one electrical connector is a wire bond. 27. The integrated circuit of package claim 23, wherein the at least one electrical connector is a metal strip. 28. The integrated circuit package of claim 16, wherein the second side of the substrate has no conducting material in the area below the antenna pattern. 29. The integrated circuit package of claim 16, further comprises package terminals disposed on the second side of the substrate. 30. The integrated circuit package of claim 29, wherein the package terminals are dispersed in both the area below the antenna pattern and an area not below the antenna pattern. 31. The integrated circuit package of claim 29, wherein the package terminals are dispersed in an area not below the antenna pattern. 32. The integrated circuit package of claim 29, wherein at least one connection forms a 90 degree angle. 33. The integrated circuit package of claim 32, wherein all connections form 90 degree angles. 34. An integrated circuit package comprising: a package housing having a plurality of package terminals provided on an exterior surface thereof; andan antenna fully enclosed in said package, the antenna comprising a plurality of conducting segments that form a curve, the segments connected to each other at their ends, wherein each connection forms two different angles, wherein at least two connections have angles less than 115 degrees; anda semiconductor chip provided within the package housing, the chip having a first terminal electrically coupled to the antenna and a second terminal coupled to the package terminals via wirebond connections. 35. The integrated circuit package of claim 34, wherein the segments are shorter than one-tenth of a longest free-space operating wavelength of the antenna. 36. The integrated circuit package of claim 34, wherein the antenna is disposed in a rectangular area having a longest side shorter than one-fifth of a longest free-space operating wavelength of the antenna. 37. The integrated circuit package of claim 34, wherein the package terminals cover less than 50% of an area below the antenna. 38. The integrated circuit package of claim 34, wherein at least one connection forms a 90 degree angle. 39. The integrated circuit package of claim 38, wherein all connections form 90 degree angles. 40. An integrated circuit package comprising: a package housing having a plurality of package terminals provided on an exterior surface thereof; andan antenna fully enclosed in said package, the antenna comprising a plurality of conducting segments that form a curve, the segments connected to each other at their ends, wherein each connection forms two different angles, wherein all connections form 90 degree angles; anda semiconductor chip provided within the package housing, the chip having a first terminal electrically coupled to the antenna and a second terminal coupled to the package terminals via wirebond connections.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.