IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0458014
(2009-06-29)
|
등록번호 |
US-8207590
(2012-06-26)
|
우선권정보 |
KR-10-2008-0064204 (2008-07-03); KR-10-2008-0106530 (2008-10-29) |
발명자
/ 주소 |
- Park, Byung-Jun
- Kim, Sang-Hee
|
출원인 / 주소 |
- Samsung Electronics Co., Ltd.
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
7 인용 특허 :
13 |
초록
▼
A method of fabricating a CMOS image sensor includes forming a substrate structure that includes a first substrate, a second substrate, and an index matching layer containing nitrogen and an oxide layer between the first and second substrates, and, forming at least one light-sensing device in the se
A method of fabricating a CMOS image sensor includes forming a substrate structure that includes a first substrate, a second substrate, and an index matching layer containing nitrogen and an oxide layer between the first and second substrates, and, forming at least one light-sensing device in the second substrate, and after forming the substrate structure, forming a metal interconnection structure on a first surface of the second substrate, the first surface facing away from the first substrate, such that the at least one light sensing device is between the metal interconnection structure and the index matching layer and the oxide layer, the metal interconnection structure being electrically connected to the at least one light-sensing device.
대표청구항
▼
1. A CMOS image sensor, comprising: a silicon-based substrate having a thermal oxide layer at a second surface thereof, the thermal oxide layer being integral with the substrate;at least one light-sensing device in the substrate; anda metal interconnection structure on a first surface of the substra
1. A CMOS image sensor, comprising: a silicon-based substrate having a thermal oxide layer at a second surface thereof, the thermal oxide layer being integral with the substrate;at least one light-sensing device in the substrate; anda metal interconnection structure on a first surface of the substrate, the first surface being opposite the second surface, such that the at least one light sensing device is between the metal interconnection structure and the thermal oxide layer, the metal interconnection structure being electrically connected to the at least one light-sensing device. 2. The CMOS image sensor as claimed in claim 1, further comprising a refractive index matching layer containing nitrogen on the thermal oxide layer, the thermal oxide layer being between the refractive index matching layer and the at least one light sensing device. 3. The CMOS image sensor as claimed in claim 2, wherein the refractive index matching layer is a silicon nitride layer, the thermal oxide layer being between the silicon nitride layer and the at least one light-sensing device. 4. The CMOS image sensor as claimed in claim 2, wherein: adjacent light sensing devices are in the substrate,an isolation structure is between the adjacent light-sensing devices, andthe isolation structure extends from the first surface of the substrate to a depth sufficient to block optical cross-talk between each of the adjacent light sensing devices. 5. The CMOS image sensor as claimed in claim 4, wherein: the isolation structure extends from the first surface of the substrate to the thermal oxide layer, andthe isolation structure does not pass through the thermal oxide layer. 6. The CMOS image sensor as claimed in claim 4, wherein: the refractive index matching layer is a silicon nitride layer, andthe isolation structure extends from the first surface and passes through the silicon nitride layer. 7. The CMOS image sensor as claimed in claim 1, further comprising a shallow implant layer in the substrate, the shallow implant layer being between the thermal oxide layer and the bulk of the substrate. 8. The CMOS image sensor as claimed in claim 7, wherein the shallow implant layer is a boron-containing layer. 9. The CMOS image sensor as claimed in claim 1, further comprising an etch stop layer on the thermal oxide layer. 10. The CMOS image sensor as claimed in claim 1, further comprising another substrate on the metal interconnection structure, such that the metal interconnection structure is between the substrate and the other substrate. 11. The CMOS image sensor as claimed in clam 10, wherein: an adhesive layer is on the metal interconnection structure,an opposing adhesive layer is on the other substrate, andthe adhesive layer and the opposing adhesive layer directly contact one another. 12. A method of fabricating a CMOS image sensor, the method comprising: forming a substrate structure that includes a first substrate, a second, silicon-based substrate, and a refractive index matching layer containing nitrogen and a thermal oxide layer between the first and second substrates, the second substrate having the thermal oxide layer at a second surface thereof, the thermal oxide layer being integral with the second substrate, the thermal oxide layer being formed by thermal oxidation of the second surface of the second substrate opposite a first surface;forming at least one light-sensing device in the second substrate; andafter forming the substrate structure, forming a metal interconnection structure on the first surface of the second substrate, the first surface facing away from the first substrate, such that the at least one light sensing device is between the metal interconnection structure and the refractive index matching layer and the thermal oxide layer, the metal interconnection structure being electrically connected to the at least one light-sensing device. 13. The method as claimed in claim 12, wherein: the thermal oxide layer is formed between the refractive index matching layer and the second substrate. 14. The method as claimed in claim 13, further comprising forming a shallow implant layer in the second substrate, such that the shallow implant layer is between the bulk of the second substrate and the thermal oxide layer. 15. The method as claimed in claim 14, wherein forming the shallow implant layer includes implanting ions of a p-type dopant into the second substrate and thermally activating the implanted ions. 16. The method as claimed in claim 13, wherein: the refractive index matching layer is formed from a silicon nitride layer, andforming the substrate structure further includes forming a bonding oxide layer on the silicon nitride layer, the bonding oxide layer contacting the first substrate. 17. The method as claimed in claim 16, wherein forming the substrate structure further includes, after bonding the first and second substrates together and before forming the at least one light-sensing device, removing a portion of the second substrate so as to thin the second substrate by about 50% or more. 18. The method as claimed in claim 16, wherein forming the substrate structure further includes: forming a microcavity layer in the second substrate at a predetermined distance from the thermal oxide layer before bonding the first and second substrates together,bonding the first and second substrates together, andremoving a portion of the second substrate to a depth of the microcavity layer. 19. The method as claimed in claim 18, further comprising, after removing the portion of the second substrate to the depth of the microcavity layer, forming an epitaxial layer on the second substrate, wherein the at least one light sensing device is formed after forming the epitaxial layer. 20. The method as claimed in claim 18, wherein forming the substrate structure further includes forming a shallow implant layer in the second substrate after forming the thermal oxide layer and the microcavity layer, the shallow implant layer being formed between the thermal oxide layer and the microcavity layer. 21. The method as claimed in claim 13, wherein the refractive index matching layer is formed from a silicon nitride layer. 22. The method as claimed in claim 21, wherein the thermal oxide layer and the refractive index matching layer form an antireflective layer. 23. The method as claimed in claim 13, further comprising: forming adjacent light sensing devices in the second substrate; andforming an isolation layer between the adjacent light sensing devices, wherein the isolation layer is formed to extend from the first surface of the second substrate to a depth sufficient to block optical cross-talk between each of the adjacent light sensing devices. 24. The method as claimed in claim 12, further comprising, after forming the metal interconnection structure, reducing a thickness of the first substrate by about 50% or more. 25. The method as claimed in claim 24, wherein forming the substrate structure includes forming an etch stop layer between the first substrate and the refractive index matching layer. 26. The method as claimed in 24, further comprising bonding a third substrate to the first surface of the second substrate after forming the metal interconnection structure and before reducing the thickness of the first substrate by about 50% or more. 27. A method of fabricating a CMOS image sensor, the method comprising: forming a thermal oxide layer at a second surface of a silicon-based substrate, the thermal oxide layer being integral with the substrate;forming at least one light-sensing device in the substrate; andforming a metal interconnection structure on a first surface of the substrate, the first surface being opposite the second surface, such that the at least one light sensing device is between the metal interconnection structure and the thermal oxide layer, the metal interconnection structure being electrically connected to the at least one light-sensing device.
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