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Charged particle beam system 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G01N-023/227
출원번호 US-0944434 (2010-11-11)
등록번호 US-8304725 (2012-11-06)
우선권정보 JP-2006-079908 (2006-03-23)
발명자 / 주소
  • Komuro, Osamu
  • Nasu, Osamu
출원인 / 주소
  • Hitachi High Technologies Corporation
대리인 / 주소
    McDermott Will & Emery LLP
인용정보 피인용 횟수 : 72  인용 특허 : 6

초록

A charged particle beam system wherein the output of the secondary electron detector is detected while the retarding voltage is varied between the values for which the secondary electrons do not reach the sample and the values for which the secondary electrons reach the sample, and the surface poten

대표청구항

1. A scanning electron microscope comprising: a source of an electron beam;an acceleration electrode for accelerating the electron beam;a detector for detecting a signal generated based on an irradiation of the electron beam to a sample;a negative voltage generator for applying a variable potential

이 특허에 인용된 특허 (6)

  1. Marella, Paul F.; McCord, Mark A.; Mankos, Marian; Adler, David L., Electrical process monitoring using mirror-mode electron microscopy.
  2. Suhara,Hiroyuki, Method and device for measuring surface potential distribution.
  3. Miyoshi Motosuke (Tokyo JPX) Okumura Katsuya (Yokohama JPX), Method of testing semiconductor elements.
  4. Todokoro Hideo (Tokyo JPX) Shinada Hiroyuki (Chofu JPX) Seitoh Shigemitsu (Hachioji JPX), Potential measurement device.
  5. Ezumi, Makoto; Ose, Yoichi; Ikegami, Akira; Todokoro, Hideo; Ishijima, Tatsuaki; Sato, Takahiro; Fukaya, Ritsuo; Asao, Kazunari, Sample electrification measurement method and charged particle beam apparatus.
  6. Todokoro, Hideo; Takami, Shou; Ezumi, Makoto; Yamada, Osamu; Ose, Yoichi; Kudo, Tomohiro, Scanning electron microscope.

이 특허를 인용한 특허 (72)

  1. Zwart, Gerrit Townsend; Cooley, James, Active return system.
  2. Zwart, Gerrit Townsend; Gall, Kenneth P.; Van der Laan, Jan; Rosenthal, Stanley; Busky, Michael; O'Neal, III, Charles D.; Franzen, Ken Yoshiki, Adjusting energy of a particle beam.
  3. Zwart, Gerrit Townsend; Gall, Kenneth P.; Van der Laan, Jan; Rosenthal, Stanley; Busky, Michael; O'Neal, III, Charles D; Franzen, Ken Yoshiki, Adjusting energy of a particle beam.
  4. Stark, James M.; Rosenthal, Stanley J.; Wagner, Miles S.; Ahearn, Michael J., Applying a particle beam to a patient.
  5. Gall, Kenneth; Rosenthal, Stanley; Row, Gordon; Ahearn, Michael, Charged particle radiation therapy.
  6. Jones, Mark R.; Robinson, Mark; Franzen, Ken Yoshiki, Coil positioning system.
  7. Zwart, Gerrit Townsend; Jones, Mark R.; Cooley, James, Collimator and energy degrader.
  8. Gall, Kenneth P.; Rosenthal, Stanley; Sobczynski, Thomas C.; Molzahn, Adam C., Control system for a particle accelerator.
  9. Gall, Kenneth P.; Rosenthal, Stanley; Sobczynski, Thomas C.; Molzahn, Adam C., Control system for a particle accelerator.
  10. Gall, Kenneth P.; Zwart, Gerrit Townsend; Van der Laan, Jan; Molzahn, Adam C.; O'Neal, III, Charles D.; Sobczynski, Thomas C.; Cooley, James, Controlling intensity of a particle beam.
  11. Gall, Kenneth P.; Rosenthal, Stanley; Sobczynski, Thomas C.; Molzahn, Adam C.; O'Neal, III, Charles D.; Cooley, James, Controlling particle therapy.
  12. Shankar, Ravi; Le Neel, Olivier, Device and method for testing magnetic switches at wafer-level stage of manufacture.
  13. Gall, Kenneth P.; Zwart, Gerrit Townsend; Van der Laan, Jan; O'Neal, III, Charles D.; Franzen, Ken Yoshiki, Focusing a particle beam.
  14. Zwart, Gerrit Townsend; Gall, Kenneth P.; Van der Laan, Jan; O'Neal, III, Charles D.; Franzen, Ken Yoshiki, Focusing a particle beam using magnetic field flutter.
  15. Gall, Kenneth P.; Rosenthal, Stanley J.; Row, Gordon D.; Ahearn, Michael J., Inner gantry.
  16. Gall, Kenneth P.; Rosenthal, Stanley; Row, Gordon D.; Ahearn, Michael J., Inner gantry.
  17. Gall, Kenneth; Rosenthal, Stanley; Row, Gordon; Ahearn, Michael, Inner gantry.
  18. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing DOEs of GATECNT-tip-to-side-short-configured, NCEM-enabled fill cells.
  19. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells with first DOE including tip-to-side short configured fill cells and second DOE including chamfer short configured fill cells.
  20. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including chamfer short configured fill cells, and the second DOE including corner short configured fill cells.
  21. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including merged-via open configured fill cells, and the second DOE including metal island open configured fill cells.
  22. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including merged-via open configured fill cells, and the second DOE including snake open configured fill cells.
  23. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including side-to-side short configured fill cells, and the second DOE including chamfer short configured fill cells.
  24. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including side-to-side short configured fill cells, and the second DOE including tip-to-side short configured fill cells.
  25. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including snake open configured fill cells, and the second DOE including metal island open configured fill cells.
  26. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including tip-to-tip short configured fill cells, and the second DOE including chamfer short configured fill cells.
  27. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including tip-to-tip short configured fill cells, and the second DOE including corner short configured fill cells.
  28. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including via open configured fill cells, and the second DOE including merged-via configured fill cells.
  29. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including via open configured fill cells, and the second DOE including metal island open configured fill cells.
  30. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit containing first and second does of standard cell compatible, NCEM-enabled fill cells, with the first DOE including side-to-side short configured fill cells, and the second DOE including tip-to-tip short configured fill cells.
  31. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit including NCEM-Enabled, tip-to-tip gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates.
  32. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit including NCEM-enabled, corner gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates.
  33. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit including NCEM-enabled, diagonal gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates.
  34. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit including NCEM-enabled, interlayer overlap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates.
  35. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit including NCEM-enabled, side-to-side gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates.
  36. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit including NCEM-enabled, snake-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates.
  37. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit including NCEM-enabled, tip-to-side gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates.
  38. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Integrated circuit including NCEM-enabled, via-open/resistance-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gate.
  39. Gall, Kenneth P.; Zwart, Gerrit Townsend, Interrupted particle source.
  40. Gall, Kenneth P.; Zwart, Gerrit Townsend; Van Der Laan, Jan; Franzen, Ken Yoshiki, Magnetic field regenerator.
  41. Zwart, Gerrit Townsend; Van der Laan, Jan; Gall, Kenneth P.; Sobczynski, Stanislaw P., Magnetic shims to alter magnetic fields.
  42. O'Neal, III, Charles D.; Molzahn, Adam C.; Vincent, John J., Matching a resonant frequency of a resonant cavity to a frequency of an input voltage.
  43. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Method for processing a semiconductor wafer using non-contact electrical measurements indicative of a least one side-to-side short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective side-to-side short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage.
  44. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one chamfer short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective chamfer short, corner short, and via open test areas.
  45. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one side-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective side-to-side short, corner short, and via open test areas.
  46. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, chamfer short, and corner short test areas.
  47. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one chamfer short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, chamfer short, and via open test areas.
  48. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one side-to-side short or leakages, and at least one via respective tip-to-tip short, side-to-side short, and via open test areas.
  49. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one chamfer short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and chamfer short test areas.
  50. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side sort, and corner short test areas.
  51. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage.
  52. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas.
  53. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Method for processing a semiconductor wager using non-contact electrical measurements indicative of a resistance through a stitch, where such measurements are obtained by scanning a pad comprised of at least three parallel conductive stripes using a moving stage with beam deflection to account for motion of the stage.
  54. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Method for processing a semiconductor water using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one side-to-side short or leakage, and at least one chamfer short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, side to side short, and chamfer short test areas.
  55. Zwart, Gerrit Townsend; O'Neal, III, Charles D.; Franzen, Ken Yoshiki, Particle accelerator that produces charged particles having variable energies.
  56. Zwart, Gerrit Townsend; Cooley, James; Franzen, Ken Yoshiki; Jones, Mark R.; Li, Tao; Busky, Michael, Particle beam scanning.
  57. Bouchet, Lionel G.; Rakes, Richard Bruce, Patient positioning system.
  58. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making an integrated circuit that includes NCEM-Enabled, tip-to-side gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates.
  59. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making an integrated circuit that includes NCEM-enabled, interlayer overlap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates.
  60. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-Enabled fill cells, with the first DOE including tip-to-side short configured fill cells, and the second DOE including chamfer short configured fill cells.
  61. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including chamfer short configured fill cells, and the second DOE including corner short configured fill cells.
  62. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including merged-via open configured fill cells, and the second DOE including snake open configured fill cells.
  63. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including merged-via open configured fill cells, and the second DOE including stitch open configured fill cells.
  64. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including side-to-side short configured fill cells, and the second DOE including chamfer short configured fill cells.
  65. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including snake open configured fill cells, and the second DOE including metal island open configured fill cells.
  66. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including snake open configured fill cells, and the second DOE including stitch open configured fill cells.
  67. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including tip-to-tip short configured fill cells, and the second DOE including chamfer short configured fill cells.
  68. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including via open configured fill cells, and the second DOE including metal island open configured fill cells.
  69. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including via open configured fill cells, and the second DOE including stitch open configured fill cells.
  70. Lam, Stephen; Ciplickas, Dennis; Brozek, Tomasz; Cheng, Jeremy; Comensoli, Simone; De, Indranil; Doong, Kelvin; Eisenmann, Hans; Fiscus, Timothy; Haigh, Jonathan; Hess, Christopher; Kibarian, John; Lee, Sherry; Liao, Marci; Lin, Sheng-Che; Matsuhashi, Hideki; Michaels, Kimon; O'Sullivan, Conor; Rauscher, Markus; Rovner, Vyacheslav; Strojwas, Andrzej; Strojwas, Marcin; Taylor, Carl; Vallishayee, Rakesh; Weiland, Larg; Yokoyama, Nobuharu, Process for making and using a semiconductor wafer containing first and second does of standard cell compatible, NCEM-enabled fill cells, with the first DOE including side-to-side short configured fill cells, and the second DOE including tip-to-side short configure.
  71. Sliski, Alan; Gall, Kenneth, Programmable radio frequency waveform generator for a synchrocyclotron.
  72. O'Neal, III, Charles D.; Molzahn, Adam C., Scanning system for a particle therapy system.
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