[특허]Multi-layer cyclic redundancy check code in wireless communication system

[미국특허] Multi-layer cyclic redundancy check code in wireless communication system 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H03M-013/00
출원번호	US-0468185 (2012-05-10)
등록번호	US-8327237 (2012-12-04)
발명자 / 주소	Buckley, Michael E. Blankenship, Yufei W. Classon, Brian K. Nimbalker, Ajit Stewart, Kenneth A.
출원인 / 주소	Motorola Mobility LLC
대리인 / 주소	Bowler, II, Roland K.
인용정보	피인용 횟수 : 6 인용 특허 : 21

초록 ▼

A wireless communication device includes a transmitter configured to transmit a transport block with a sequence of bits wherein A is the number of bits, a first CRC coder configured to generate a first block of CRC parity bits on a transport block and to associates the first block of CRC parity bits with the transport block, wherein a number of CRC parity bits in the first block is L, a segmenting entity configured to segment the transport block into multiple code blocks after associating when A+L is larger than 6144, a second CRC coder configured to generate a second block of CRC parity bits on each code block and to associate a second block of CRC parity bits with each code block, and a channel encoder configured to encode each of the code blocks including the associated second block of CRC parity bits if A+L6144.

대표청구항 ▼

1. A wireless communication device comprising: a transmitter configured to obtain a transport block comprising a sequence of bits, wherein A is the number of bits,a first cyclic redundancy check (CRC) coder configured to generate a first block of CRC parity bits on the transport block, the first CRC coder configured to associate the first block of CRC parity bits with the transport block, wherein a number of CRC parity bits in the first block is L=24, the first CRC coder having D24+D23+D18+D17+D14+D11+D10+D7+D6+D5+D4+D3+D+1 as a generator polynomial;a segmenting entity having an input coupled to the first CRC coder, the segmenting entity configured to segment the transport block into multiple code blocks after associating when A+L is larger than 6144;a second CRC coder configured to generate a second block of CRC parity bits for each code block, each second block of CRC parity bits generated using a corresponding code block, the second CRC coder configured to associate each second block of CRC parity bits with the corresponding code block, the second CRC coder having D24+D23+D6+D5+D+1 as a generator polynomial; anda channel encoder configured to encode each of the code blocks including the associated second block of CRC parity bits. 2. The device of claim 1, wherein A>6120. 3. A wireless communication device comprising: a transmitter configured to obtain a transport block comprising a sequence of bits, wherein A is the number of bits,a first cyclic redundancy check (CRC) coder configured to generate a first block of CRC parity bits on the transport block, the first CRC coder configured to associate the first block of CRC parity bits with the transport block, the first CRC coder having D24+D23+D18+D17+D14+D11+D10+D7+D6+D5+D4+D3+D+1 as a generator polynomial;a segmenting entity having an input coupled to the first CRC coder, the segmenting entity configured to segment the transport block into multiple code blocks after associating when a condition is satisfied;a second CRC coder configured to generate a second block of CRC parity bits for each code block, each second block of CRC parity bits generated using a corresponding code block, the second CRC coder configured to associate each second block of CRC parity bits with the corresponding code block, the second CRC coder having D24+D23+D6+D5+D+1 as a generator polynomial; anda channel encoder configured to encode each of the code blocks including the associated second block of CRC parity bits. 4. The device of claim 3, wherein the condition is based on A and L, wherein L is a number of CRC parity bits in the first block. 5. The device of claim 4, wherein L=24 and A>6120. 6. The device of claim 4, wherein the segmenting entity configured to segment the transport block into multiple code blocks after associating when A+L is greater than 6144. 7. The device of claim 6, wherein L=24 and A>6120.

이 특허에 인용된 특허 (21) 인용/피인용 타임라인 분석

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이 특허를 인용한 특허 (6) 인용/피인용 타임라인 분석

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A	생활필수품
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[미국특허] Multi-layer cyclic redundancy check code in wireless communication system 원문보기