IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0004179
(2007-12-20)
|
등록번호 |
US-8426257
(2013-04-23)
|
우선권정보 |
KR-10-2007-0021453 (2007-03-05) |
발명자
/ 주소 |
- Park, Hyun-Sik
- Lee, Hae-Jung
- Lee, Jae-Kyun
|
출원인 / 주소 |
|
대리인 / 주소 |
Blakely, Sokoloff, Taylor & Zafman
|
인용정보 |
피인용 횟수 :
0 인용 특허 :
1 |
초록
▼
A method for fabricating a semiconductor device includes forming a fuse over a substrate, the fuse having a barrier layer, a metal layer, and an anti-reflective layer stacked, selectively removing the anti-reflective layer, forming an insulation layer over a whole surface of the resultant structure
A method for fabricating a semiconductor device includes forming a fuse over a substrate, the fuse having a barrier layer, a metal layer, and an anti-reflective layer stacked, selectively removing the anti-reflective layer, forming an insulation layer over a whole surface of the resultant structure including the fuse, and performing repair-etching such that part of the insulation layer remains above the fuse.
대표청구항
▼
1. A method for fabricating a semiconductor device, the method comprising: forming a substrate having a cell region and a fuse region;forming a metal interconnection in the cell region and a fuse in the fuse region, the fuse having a barrier layer, a metal layer, and an anti-reflective layer stacked
1. A method for fabricating a semiconductor device, the method comprising: forming a substrate having a cell region and a fuse region;forming a metal interconnection in the cell region and a fuse in the fuse region, the fuse having a barrier layer, a metal layer, and an anti-reflective layer stacked, wherein the metal interconnection has the same structure with the fuse and is concurrently formed with the fuse;completely removing the anti-reflective layer and simultaneous etching a portion of the metal layer to expose an upper portion of the etched metal layer, thereby forming a resultant structure, wherein the anti-reflective layer and the portion of the metal layer are etched using a gas mixture of chlorine (Cl2), trichloroborane (BCl3), argon (Ar), nitrogen (N2 ) and fluoroform (CHF3);forming an insulation layer over a whole surface of the resultant structure including the fuse; andperforming a repair-etching such that part of the insulation layer remains above the fuse,wherein the anti-reflective layer includes any one of a single-layered structure of any one selected from a Ti layer, a TiN layer, and a silicon oxynitride (SiON) layer, and a stacked structure of the Ti layer, a TiN layer, and a SiON layer. 2. The method of claim 1, wherein the barrier layer is one selected from a single-layered structure of a titanium (Ti) layer or a titanium nitride (TiN) layer, a stacked structure of the Ti layer and the TiN layer, and a stacked structure of the Ti layer, the Ti layer, and the TiN layer. 3. The method of claim 1, wherein the metal layer includes aluminum (Al). 4. The method of claim 1, wherein the gas of Cl2 is used in an amount from approximately 30 sccm to approximately 200 sccm, the gas of BCl3 is used in an amount from approximately 30 sccm to approximately 200 sccm, the gas of Ar is used in an amount from approximately 30 sccm to approximately 150 sccm, the gas of N2 is used in an amount from approximately 1 sccm to approximately 20 sccm, and the gas of CHF3 is used in an amount from approximately 15 sccm to approximately 150 sccm. 5. The method of claim 1, wherein the anti-reflective layer and the portion of the metal layer are etched by applying a pressure from approximately 7 mT to approximately 20 mT, a top power from approximately 400 W to approximately 1,000 W, and a bottom power from approximately 50 W to approximately 200 W. 6. The method of claim 1, wherein the portion of the metal layer is etched at a thickness from approximately 500 Å to approximately 3,000 Å. 7. The method of claim 1, wherein the insulation layer includes an oxide layer.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.