[특허]Low profile compliant leads

[미국특허] Low profile compliant leads 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H05K-001/16
출원번호	US-0350276 (2006-02-09)
등록번호	US-8481862 (2013-07-09)
발명자 / 주소	Pai, Deepak K. Graf, Melvin Eric
출원인 / 주소	General Dynamics Advanced Information Systems, Inc.
대리인 / 주소	Ingrassia Fisher & Lorenz, P.C.
인용정보	피인용 횟수 : 1 인용 특허 : 28

초록 ▼

The present invention relates to a connector system for resiliently attaching and electrically connecting an integrated circuit chip to a circuit board using a plurality of leads. Each of the plurality of leads are sized and arranged to form a curved body having a first leg and a second leg with a curved portion between the first leg and the second leg. The curved body of the leads may be C-shaped in accordance with the present invention. The plurality of leads may be formed from strips of copper foil or copper mesh folded to form the curved body. The plurality of leads may also be sized and arranged to support the integrated circuit chip in a generally flat arrangement relative to the circuit board with a maximum separation of about 0.016 inches or less between the integrated circuit chip and the circuit board.

대표청구항 ▼

1. A connector system for resiliently attaching and electrically connecting a first set of contacts substantially located on a first surface of a circuit chip to a second set of contacts substantially located on a second surface of a circuit board, the connector system comprising: a plurality of leads in predetermined spaced relation, each of the plurality of leads being sized and arranged to form a C-shaped body having a first leg and a second leg, the first leg and second leg being substantially parallel with a curved portion between the first leg and the second leg;each of the plurality of leads including a strip of copper foil folded to form the C-shaped body with the first leg having a first surface configured to connect to at least one of the first set of contacts and the second leg having a second surface configured to connect to at least one of the second set of contacts, the plurality of leads being sized and arranged such that the first surface of the circuit chip is substantially parallel to the second surface of a circuit board; andwherein the plurality of leads defines a separation of about 0.010 inches or less between the first surface of the circuit chip and the second surface of the circuit board. 2. The connector system according to claim 1, wherein the copper foil is about 0.0028 inch thick copper foil. 3. The connector system according to claim 2, wherein the strip of copper foil includes a first liquid solder mask on the first leg and a second liquid solder mask on the second leg. 4. The connector system according to claim 2, wherein the plurality of leads defines a separation of about 0.010 inches or less between the first surface of the circuit chip and the second surface of the circuit board, when the leads are in an uncompressed state. 5. The connector system according to claim 3, wherein exposed surfaces of the copper foil are plated with at least one of immersion silver and immersion tin. 6. The connector system according to claim 3, wherein the plurality of leads defines a separation of about 0.010 inches or less between the first surface of the circuit chip and the second surface of the circuit board, when the leads are in an uncompressed state. 7. The connector system according to claim 5, wherein the strip of the copper foil is approximately 0.028 inches wide. 8. The connector system according to claim 5, wherein the plurality of leads defines a separation of about 0.010 inches or less between the first surface of the circuit chip and the second surface of the circuit board, when the leads are in an uncompressed state. 9. The connector system according to claim 7, wherein the plurality of leads defines a separation of about 0.010 inches or less between the first surface of the circuit chip and the second surface of the circuit board, when the leads are in an uncompressed state. 10. The connector system according to claim 1, wherein the first leg is soldered to at least one of the first contacts using Sn96.5:Ag3.5 solder alloy with a melting point of approximately 221° C. 11. The connector system according to claim 10, wherein the plurality of leads defines a separation of about 0.010 inches or less between the first surface of the circuit chip and the second surface of the circuit board, when the leads are in an uncompressed state. 12. The connector system according to claim 1, wherein the plurality of leads defines a separation of about 0.010 inches or less between the first surface of the circuit chip and the second surface of the circuit board, when the leads are in an uncompressed state.

이 특허에 인용된 특허 (28) 인용/피인용 타임라인 분석

Stroupe, Hugh E., Assembly for attaching die to leads.
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Morris James B. (Bloomington MN), Ceramic IC package attachment apparatus.
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Zhu, Qi; Ma, Lunya; Sitaraman, Suresh K., Compliant off-chip interconnects.
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Chan Benson ; Desai Kishor V. ; Sherman John H., Compliant, surface-mountable interposer.
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DiFranco Dino F. (Mayfield Village OH) Clouser Sidney J. (Chardon OH), Copper foils for printed circuit board applications and procedures and electrolyte bath solutions for electrodepositing.
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DiFranco Dino F. (Mayfield Village OH) Clouser Sidney J. (Chardon OH), Electrodeposited foil with controlled properties for printed circuit board applications and procedures and electrolyte b.
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Baker, David R.; Wang, Hung-Ming, Graded metallic leads for connection to microelectronic elements.
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David R. Baker ; Hung-Ming Wang, Graded metallic leads for connection to microelectronic elements.
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Parthasarathi Arvind (North Branford CT) Mahulikar Deepak (Madison CT), Lead frames having a chromium and zinc alloy coating.
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Goldhammer Kurt R. (West Milford NJ), Lead wire array for a leadless chip carrier.
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Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of planarizing tips of probe elements of a probe card assembly.
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Sullivan Kenneth W., Methods for fabricating solderless printed wiring devices.
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Swamy N. Deepak (Austin TX), Printed circuit board having a land with an inwardly facing surface and method for manufacturing same.
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Brodsky, William Louis; Chan, Benson; Gaynes, Michael Anthony; Markovich, Voya Rista, Printed wiring board interposer sub-assembly.
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Morris James B. (Bloomington MN), Process for assembling integrated circuit packages.
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Phy William S. (Los Altos Hills CA), Process of forming a compliant lead frame for array-type semiconductor packages.
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Chen, Wei-Chen, Resilient contact element.
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Yama Yomiyuki,JPX ; Kobayashi Masao,JPX ; Shibata Jun,JPX ; Baba Shinji,JPX ; Watanabe Masaki,JPX, Semiconductor device with tape automated bonding element.
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Jimarez Miguel Angel ; Sarkhel Amit Kumar ; White Lawrence Harold, Solder hierarchy for chip attachment to substrates.
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Beroz Masud ; Karavakis Konstantine ; Distefano Thomas H., Structure and method for making a compliant lead for a microelectronic device.
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Kitahara Akira (585-4 ; Kamojima ; Kamojimacho Oe-gun Tokushima JPX), Surface mount components and semifinished products thereof.
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Kitahara Akira (585-4 ; Kamojima Oe-gun ; Tokushima JPX), Surface mount components and semifinished products thereof.
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Hugh E. Stroupe, Technique for attaching die to leads.
상세보기
Stroupe Hugh E., Technique for attaching die to leads.
상세보기
Stroupe Hugh E., Technique for attaching die to leads.
상세보기
Stroupe Hugh E., Technique for attaching die to leads.
상세보기
Stroupe Hugh E., Technique for attaching die to leads.
상세보기
Stroupe Hugh E., Technique for attaching die to leads.
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이 특허를 인용한 특허 (1) 인용/피인용 타임라인 분석

Ananiev, Sergey, Package with terminal pins with lateral reversal point and laterally exposed free end.
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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

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[미국특허] Low profile compliant leads 원문보기