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Pulse sequence for plating on thin seed layers 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • C25D-005/18
  • C25D-007/12
출원번호 US-0786329 (2010-05-24)
등록번호 US-8500983 (2013-08-06)
발명자 / 주소
  • Ponnuswamy, Thomas A.
  • Pennington, Bryan
  • Berry, Clifford
  • Buckalew, Bryan L.
  • Mayer, Steven T.
출원인 / 주소
  • Novellus Systems, Inc.
대리인 / 주소
    Weaver Austin Villeneuve & Sampson LLP
인용정보 피인용 횟수 : 10  인용 특허 : 23

초록

A plating protocol is employed to control plating of metal onto a wafer comprising a conductive seed layer. Initially, the protocol employs cathodic protection as the wafer is immersed in the plating solution. In certain embodiments, the current density of the wafer is constant during immersion. In

대표청구항

1. A method of controlling plating of copper interconnects on a semiconductor wafer, the method comprising: (a) immersing a plating surface of the wafer in plating bath comprising a copper salt and a suppressor while applying a cathodic current to the wafer in the range of about 1.5 to 20 mA/cm2 dur

이 특허에 인용된 특허 (23)

  1. Andricacos Panayotis C. (Croton-on-Hudson NY) Chang I-Chia (Peekskill NY) Deligianni Hariklia (Edgewater NJ) Horkans Wilma J. (Ossining NY), Acid electrolyte solution and process for the electrodeposition of copper-rich alloys exploiting the phenomenon of under.
  2. Mayer, Steven T.; Reid, Jonathan; Contolini, Robert, Apparatus for potential controlled electroplating of fine patterns on semiconductor wafers.
  3. Patton Evan E. ; Fetters Wayne, Clamshell apparatus for electrochemically treating semiconductor wafers.
  4. Combs Daniel J. (Sterling Heights MI), Composition and method for electrodeposition of copper.
  5. Sonnenberg Wade (Hull MA) Fisher Gordon (Sudbury MA) Bernards Roger F. (Wellesley MA) Houle Patrick (Framingham MA), Copper electroplating solutions and processes.
  6. Zheng, Bo; He, Renren; Dixit, Girish, ECP gap fill by modulating the voltate on the seed layer to increase copper concentration inside feature.
  7. Landau Uziel ; D'Urso John J. ; Rear David B., Electro deposition chemistry.
  8. Landau Uziel, Electro-chemical deposition system and method of electroplating on substrates.
  9. Kardos Otto (Ferndale MI) Arcilesi Donald A. (Mount Clemens MI) Valayil Silvester P. (Pontiac MI), Electrodeposition of copper.
  10. Reid Jonathan David ; Contolini Robert J. ; Dukovic John Owen, Electroplating anode including membrane partition system and method of preventing passivation of same.
  11. Reid, Jonathan D.; Smith, David; Mayer, Steven T.; Henri, Jon; Varadarajan, Sesha, Electroplating process for avoiding defects in metal features of integrated circuit devices.
  12. Ting Chiu H. ; Holtkamp William H. ; Brodowski Richard W. ; Wytman Joseph B., Introducing and reclaiming liquid in a wafer processing chamber.
  13. Reid, Jonathan David; Contolini, Robert J.; Dukovic, John Owen, Membrane partition system for plating of wafers.
  14. Robertson, Peter M., Method and apparatus for determination of additives in metal plating baths.
  15. Zheng, Bo; Wang, Hougong; Dixit, Girish; Chen, Fusen, Method of application of electrical biasing to enhance metal deposition.
  16. Lashmore David S. (Frederick MD), Process and bath for electroplating nickel-chromium alloys.
  17. Mayer, Steven T.; Bhaskaran, Vijay; Patton, Evan E.; Jackson, Robert L.; Reid, Jonathan, Process for electroplating metal into microscopic recessed features.
  18. Mayer, Steven T.; Bhaskaran, Vijay; Patton, Evan E.; Jackson, Robert L.; Reid, Jonathan, Process for electroplating metals into microscopic recessed features.
  19. Alperine Alexandre Serge,FRX ; Fournes Jean-Paul,FRX ; Leger Louis Jacques,FRX, Process for producing a coating for providing superalloys with highly efficient protection against high-temperature corrosion, a protective coating formed by the process, and articles protected by th.
  20. Dubin Valery ; Ting Chiu ; Cheung Robin W., Pulse electroplating copper or copper alloys.
  21. Taylor E. Jennings ; Zhou Chengdong ; Sun Jenny J., Pulse reverse electrodeposition for metallization and planarization of a semiconductor substrates.
  22. Taylor E. Jennings ; Sun Jenny J. ; Inman Maria E., Sequential electrodeposition of metals using modulated electric fields for manufacture of circuit boards having features of different sizes.
  23. Lopatin Sergey D. ; Buynoski Matthew S., Time ramped method for plating of high aspect ratio semiconductor vias and channels.

이 특허를 인용한 특허 (10)

  1. Chandrasekhar, Prasanna, Complimentary polymer electrochromic device.
  2. Chandrasekhar, Prasanna, Complimentary polymer electrochromic device.
  3. Chandrasekhar, Prasanna, Complimentary polymer electrochromic device.
  4. Spurlin, Tighe A.; Zhou, Jian; Opocensky, Edward C.; Reid, Jonathan; Mayer, Steven T., Current ramping and current pulsing entry of substrates for electroplating.
  5. Chandrasekhar, Prasanna; Zay, Brian J.; Laganis, Edward J.; Romanov, Vasily V.; LaRosa, Anthony J., Electrochromic eyewear.
  6. Mayer, Steven T., Monitoring leveler concentrations in electroplating solutions.
  7. Mayer, Steven T., Monitoring leveler concentrations in electroplating solutions.
  8. Chandrasekhar, Prasanna; Chai, Yanjie, Potentiostat/galvanostat with digital interface.
  9. Brogan, Lee; Mayer, Steven T.; Thorum, Matthew; Richardson, Joseph; Porter, David W.; Fu, Haiying, TSV bath evaluation using field versus feature contrast.
  10. Chandrasekhar, Prasanna, Variable-emittance electrochromic devices and methods of preparing the same.
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