|국가/구분||United States(US) Patent 등록|
|미국특허분류(USC)||712/015; 712/029; 712/039; 712/232; 712/041|
|발명자 / 주소|
|출원인 / 주소|
|대리인 / 주소||
|인용정보||피인용 횟수 : 1 인용 특허 : 437|
The present invention concerns a new category of integrated circuitry and a new methodology for adaptive or reconfigurable computing. The preferred IC embodiment includes a plurality of heterogeneous computational elements coupled to an interconnection network. The plurality of heterogeneous computational elements include corresponding computational elements having fixed and differing architectures, such as fixed architectures for different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfigura...
1. An adaptive computing engine comprising: a plurality of computational matrices, at least one of the computational matrices comprising a plurality of heterogeneous computational elements, at least two of which each perform an arithmetic operation and each having components in a fixed architecture with fixed connections between the components; andan interconnection network coupling the plurality of computational matrices to each other,the interconnection network for transmitting data between the plurality of computational matrices, and for transmitting ...