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Method for forming ultra-shallow boron doping regions by solid phase diffusion 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/22
  • H01L-021/38
출원번호 US-0077688 (2011-03-31)
등록번호 US-8580664 (2013-11-12)
발명자 / 주소
  • Clark, Robert D.
출원인 / 주소
  • Tokyo Electron Limited
인용정보 피인용 횟수 : 19  인용 특허 : 19

초록

A method for forming an ultra-shallow boron dopant region in a substrate is provided. In one embodiment, the method includes depositing, by atomic layer deposition (ALD), a boron dopant layer in direct contact with the substrate, where the boron dopant layer contains an oxide, a nitride, or an oxyni

대표청구항

1. A method for forming an ultra-shallow boron (B) dopant region in a substrate, the method comprising: depositing, by atomic layer deposition (ALD), a boron dopant layer in direct contact with the substrate, the boron dopant layer containing (i) a nitride, or (ii) an oxynitride, wherein (i) and (ii

이 특허에 인용된 특허 (19)

  1. Hanafi, Hussein Ibrahim; Jones, Erin C.; Murthy, Cheruvu Suryanarayana; Oldiges, Philip Joseph; Shi, Leathen, Damascene double-gate MOSFET structure and its fabrication method.
  2. Antonelli, George Andrew; Sriram, Mandyam; Rangarajan, Vishwanathan; Subramonium, Pramod, Depositing conformal boron nitride film by CVD without plasma.
  3. Chakravarthi,Srinivasan; Chidambaram,Periannan, Fabrication of abrupt ultra-shallow junctions.
  4. Kepler Nick ; Wieczorek Karsten,DEX ; Wang Larry ; Besser Paul Raymond, Formation of junctions by diffusion from a doped film at silicidation.
  5. Doris,Bruce B.; Boyd,Diane C.; Leong,Meikei; Kanarsky,Thomas S.; Kedzierski,Jakub T.; Yang,Min, Hybrid planar and FinFET CMOS devices.
  6. Natzle, Wesley C.; Ahlgren, David C.; Barbee, Steven G.; Cantell, Marc W.; Jagannathan, Basanth; Lanzerotti, Louis D.; Subbanna, Seshadri; Wuthrich, Ryan W., Low defect pre-emitter and pre-base oxide etch for bipolar transistors and related tooling.
  7. King Clifford A. (Union County NJ) Park Byung G. (Scotch Plains NJ), MOS fabrication process, including deposition of a boron-doped diffusion source layer.
  8. Rouh, Kyoung Bong; Kim, Choon Hwan; Rho, Il Cheol, Method for fabricating PMOS transistor and method for forming dual gate using the same.
  9. Hayden James D. (Austin TX) Pfiester James R. (Austin TX) Burnett David (Austin TX), Method for fabricating a semiconductor device having a shallow doped region.
  10. Chu,Wei Kan; Shao,Lin; Lu,Xinming; Liu,Jiarui; Wang,Xuemei, Method for shallow dopant distribution.
  11. Shibib Muhammed Ayman, Method of doping a semiconductor surface.
  12. Ieong,Meikei; Dokumaci,Omer H.; Kanarsky,Thomas S.; Ku,Victor, Method of manufacturing a disposable reversed spacer process for high performance recessed channel CMOS.
  13. Schwalke Udo,DEX, Method of producing an MOS transistor.
  14. Yieh Ellie ; Xia Li-Qun ; Gee Paul ; Nguyen Bang, Methods and apparatus for forming ultra-shallow doped regions using doped silicon oxide films.
  15. Luftman Henry S. (Emmaus PA) Watts Roderick K. (Summit NJ), Process for fabricating integrated circuit containing shallow junction using dopant source containing organic polymer or.
  16. Krull, Wade A; Jacobson, Dale C., Semiconductor device and method of fabricating a semiconductor device.
  17. Wieczorek Karsten,DEX ; Kepler Nick ; Wang Larry ; Besser Paul R., Shallow junction formation by out-diffusion from a doped dielectric layer through a salicide layer.
  18. Doris, Bruce B.; Kanarsky, Thomas S.; Ieong, Meikei; Natzle, Wesley C., Structure and method to fabricate ultra-thin Si channel devices.
  19. Wang, Chih-Hao; Wang, Yen-Ping; Ting, Steve Ming; Huang, Yi-Chun, Ultra shallow junction formation by solid phase diffusion.

이 특허를 인용한 특허 (19)

  1. Pore, Viljami, Atomic layer deposition of silicon carbon nitride based materials.
  2. Pore, Viljami, Atomic layer deposition of silicon carbon nitride based materials.
  3. Pore, Viljami, Atomic layer deposition of silicon carbon nitride based materials.
  4. Basker, Veeraraghavan S.; Berliner, Nathaniel; Cho, Hyun-Jin; Faltermeier, Johnathan; Lee, Kam-Leung; Yamashita, Tenko, Conformal doping for FinFET devices.
  5. Cheng, Rui; Mallick, Abhijit Basu; Gandikota, Srinivas; Manna, Pramit, Conformal doping in 3D si structure using conformal dopant deposition.
  6. Chen, Shang; Pore, Viljami; Yamada, Ryoko; Niskanen, Antti Juhani, Deposition of SiN.
  7. Chen, Shang; Pore, Viljami; Yamada, Ryoko; Niskanen, Antti Juhani, Deposition of SiN.
  8. Pore, Viljami, Deposition of boron and carbon containing materials.
  9. Pore, Viljami, Deposition of boron and carbon containing materials.
  10. Pore, Viljami, Deposition of boron and carbon containing materials.
  11. Pore, Viljami J.; Kimura, Yosuke; Namba, Kunitoshi; Adachi, Wataru; Fukuda, Hideaki; Knaepen, Werner; Pierreux, Dieter; Jongbloed, Bert, Deposition of boron and carbon containing materials.
  12. Consiglio, Steven P.; Clark, Robert D.; O'Meara, David L., Method of controlling solid phase diffusion of boron dopants to form ultra-shallow doping regions.
  13. Jo, Eun-Young; Kang, Jong-Hoon; Kim, Tae-Gon; Choi, Han-Mei, Method of manufacturing semiconductor device having doped layer.
  14. Nainani, Aneesh; Abraham, Mathew; Ping, Er-Xuan, Methods of doping substrates with ALD.
  15. Nainani, Aneesh; Abraham, Mathew; Ping, Er-Xuan, Methods of doping substrates with ALD.
  16. Niskanen, Antti J.; Chen, Shang; Pore, Viljami, Si precursors for deposition of SiN at low temperatures.
  17. Niskanen, Antti J.; Chen, Shang; Pore, Viljami; Fukazawa, Atsuki; Fukuda, Hideaki; Haukka, Suvi P., Si precursors for deposition of SiN at low temperatures.
  18. Niskanen, Antti J.; Chen, Shang; Pore, Viljami; Fukazawa, Atsuki; Fukuda, Hideaki; Haukka, Suvi P., Si precursors for deposition of SiN at low temperatures.
  19. Granahan, Mark E., Simplified charge balance in a semiconductor device.
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