초록 ▼

An electronic access control device is disclosed comprising two microprocessors. The first microprocessor receives a wirelessly transmitted that is compared to a stored access code. If those two codes match, the first microprocessor transmits a special communication code to the second microprocessor

An electronic access control device is disclosed comprising two microprocessors. The first microprocessor receives a wirelessly transmitted that is compared to a stored access code. If those two codes match, the first microprocessor transmits a special communication code to the second microprocessor. The second microprocessor opens the lock if the transmitted communication code matches a stored communication code.

대표청구항 ▼

1. A battery-powered electronic-access control device comprising: memory containing at least one stored code;a communication port for entering an input code to access the battery-powered electronic-access control device;a circuit generating an activation signal;a first processor configured to receiv

1. A battery-powered electronic-access control device comprising: memory containing at least one stored code;a communication port for entering an input code to access the battery-powered electronic-access control device;a circuit generating an activation signal;a first processor configured to receive an input code, the first processor being active for a first period of time in response to the activation signal, the first processor receiving the input code from the communication port;a second processor separate from the first processor and being activated for a second period of time, the second processor being configured to generate a driver output signal to activate a lock actuator in response to the input code matching one of the at last one stored code;wherein the first processor and the second processor become deactivated after the first period of time and the second period of time, respectively, the deactivated mode causing the first processor and the second processor to operate at lower power consumption rates than when the first processor and the second processor are activated; anda low battery detection circuit that correlates a reference voltage to a voltage associated with a battery, and wherein the low battery detection circuit is either disabled, selectively enabled or initiated for applying the reference voltage and for correlating the voltage associated with the battery in the awake mode, the low-battery detect circuit having an enabled mode distinct from the active mode of the first or the second processor. 2. A battery-powered electronic-access control system comprising: memory containing at least one stored code;a communication port for entering an input code to access the battery-powered electronic-access control system;a circuit capable of generating a wake-up signal, the circuit comprising at least a first processor, wherein the first processor is configured to receive an input code;wherein the first processor is capable of operating in an awake mode for a period of time in response to receiving the wake-up signal from the circuit, and a sleep mode after the period of time, wherein the sleep mode causes the first processor to operate at a lower power consumption rate than when the processor is in the awake mode;a second processor being separated from the first processor and entering an awake mode distinguishable from the awake mode for the first processor, the second processor configured to generate a driver output signal to activate a driver circuit to activate a lock actuator in response to the input code matching one of the at least one stored code;a communication port operatively connected to one of either the first processor or the second processor, the connected processor receiving a write signal through the communication port, and in response to the write signal, enters a program mode of operation,receives a code through the communication port, andstores the code into the memory to form the one of the at least one stored code when the first processor or the second processor is in the awake mode, andwherein one of either the first processor or the second processor enters the sleep mode thereafter;a low-battery detection circuit for measuring a voltage associated with the battery, the detection circuit having a disabled and an enabled mode and operating at a lower power consumption rate in the disabled mode than in the enabled mode, and being selectively enabled, disabled or initiated by either the first processor or the second processor when in the awake mode, the low-battery detect circuit enabled mode being distinct from the awake mode of the first or second processor, and;wherein the first processor generates a signal to the second processor to determine if the input code matches one of the at least one stored codes. 3. A battery-powered electronic-access control system comprising: memory containing a stored access code;a first circuit for receiving an electromagnetic signal including an input code, the first circuit having an enabled mode for receiving the electromagnetic signal and decoding the electromagnetic signal into a digital signal comprising the input code, and a disabled mode, wherein the first circuit operates at a lower power consumption in the disabled mode than when the first circuit is in the enabled mode;a second circuit capable of being awakened to obtain the input code via the electromagnetic signal, the second circuit comprising a first processor operatively connected to the first circuit, the first processor having an awake mode and a sleep mode, the first processor being capable of entering the sleep mode for a period of time, and the sleep mode causes the first processor to operate at a lower power consumption rate than when the processor is in the awake mode; anda third circuit comprising a second processor separated from the first processor and from the first circuit and capable of entering an awake mode distinguishable from the awake mode of the first processor and distinguishable from the enabled mode of the first circuit, the second processor being capable of entering a sleep mode causing the second processor to operate at a lower power consumption rate than during the awake mode;an authorization signal to activate a lock actuator being generated by the third circuit in response to the input code matching the stored access code;a communication port operatively connected to one of either the first processor or the second processor, wherein the connected processor receives a program signal through the communication port, and in response to the program signal enters a program mode of operation,receives a code through the communication port from a device remote to the battery-powered electronic-access controlstores the code into the memory to form the stored access code when one of either the first processor or the second processor is in the awake mode, and wherein one of either the first processor or the second processor enters a sleep-mode at a time thereafter; andwherein the second processor determines if the input code matches the stored access code. 4. A battery-powered electronic-access control system comprising: memory containing at least one stored code;a communication port for entering an input code to access the battery-powered electronic-access control system;a circuit for generating an activation signal, the circuit comprising a first processor configured to receive an input code;wherein the first processor is activated for a first period of time in response to the activation signal, the first processor receiving the input code from the communication port;a second processor separate from the first processor and entering an awake mode distinguishable from the awake made of the first processor, the second processor being activated for a second period of time and being configured to generate a driver output signal to activate a lock actuator in response to the input code matching one of the at least one stored code;wherein the first processor and the second processor become deactivated after the first period of time and the second period of tie, respectively, the deactivated mode causing the first processor and the second processor to operate at a lower power consumption rate than when the first processor and the second processor are activated;a communication port operatively connected to one of either the first processor or the second processor, wherein one of either the first processor or the second processor receives a program signal through the communication port, and in response to the program signal enters a program mode of operation,receives a code through the communication port from a device remote to the battery-powered electronic-access control system,stores the code into the memory to form one of the at least one stored code when one of either the first processor or the second processor is in the awake mode, and enters a sleep mode at a time thereafter; and,wherein a drive circuit provides a first power state and a second power state to drive the lock actuator, a lower non-zero power output being provided to drive the lock actuator in the second power state then in the first power state, the drive circuit first power state and second power state being distinguishable from the awake mode of the first or second processor and;the first processor generates a signal to either enable or wake up the second processor to determine if the input code matches one of the at least one stored code. 5. A battery-powered electronic-access control system comprising: memory containing at least one stored code;at least two communication ports for entering at least a portion of an input code to access the battery-powered electronic-access control system;a circuit capable of generating a wake-up signal, the circuit comprising a first processor configured to receive an input code, in response to a first key being depressed on a keypad, comprising the first key and at least one subsequent keypad entry, the at least two communication ports and at least one additional communication port configured to process the wake-up signal to determine the first processor shall enter an awake mode of operation;wherein the first processor is capable of operating in an awake mode for a period of time in response to receiving the wake-up signal from the circuit, and a sleep mode after the period of time, wherein the sleep mode causes the first processor to operate at a lower power consumption rate than when the first processor is in the awake mode, a second processor being separated from the first processor and entering an awake mode distinguishable from the awake mode for the first processor, the second processor configured to generate a driver output signal to activate a lock actuator in response to the input code matching one of the at least one stored code; anda communication port operatively connected to one of either the first processor or the second processor, then connected processor receiving a write signal through the communication port, and in response to the write signal, enters a program mode of operation,receives a code through the communication port, andstores the code into the memory to form the at least one stored code when one of either the first processor or the second processor is in the awake mode, and one of either the first processor or the second processor enters the sleep mode at a time thereafter;wherein the first processor generates a signal to either enable or wake up the second processor to determine if the input code matches the at least one stored code; andwherein the processor, being in the awake mode, disables operation of the battery powered electronic access-control device for a pre-determined period of time if the processor has received a pre-determined number of invalid input codes consecutively entered through the communication port configured to receive the input code, and being in the sleep-mode sometime thereafter. 6. A battery-powered electronic-access control system comprising: a first processor and a second processor, each processor having an enabled mode and a disabled mode, wherein a current drained from a battery is less during the disabled mode than when in the enabled mode;a receiver circuit for receiving an electromagnetic signal and decoding the electromagnetic signal into a digital signal including an input code, the circuit having an enabled mode for receiving the input code and a disabled mode, wherein the receiving circuit operates at a lower power consumption in the disabled mode than when the first circuit is in the enabled mode;a circuit for sensing a signal of radio frequency and having an output that indicates detection of a remote device capable of transmitting an electromagnetic signal;wherein the first processor is in the enabled mode and obtains an input code transmitted via the electromagnetic signal, and the first processor enters a disabled mode thereafter, the second processor being separated from the first processor enters a disabled mode thereafter, the second processor being separated from the first processor and from the receiver circuit and temporarily enabled distinguishably from the enabled mode of the first processor and distinguishable from the receiver circuit, the second processor receives the input code from the first processor and compares the input code to an authorization code for authorizing operation of a system comprising one of either a latch or an alarm;operatively connected to one of either the first processor or the second processor, the first processor or the second processor being programmed to receive a write signal the communication port, and in response to the write signal, one of either the first processor or the second processor enters a program mode of operation,receives a code through the communication port from a device remote to the battery-powered electronic-access control system, andstores the code in a memory to form a stored code when one of either the first processor or the second processor is in the enabled mode, and enters the disabled mode at a time thereafter;wherein the first processor communicates a signal to either enable or wake up the second processor to compare the input code to the authorization code. 7. A battery-powered electronic-access control system comprising: memory containing a stored access code;a first circuit comprising one of either a timer or an oscillator having an output comprising a plurality of duty cycles;a second circuit for sensing an electromagnetic signal that is periodically enabled for time t1 and disabled for time t2 during at least one of the duty cycles, wherein the disabled mode causes the second circuit to operate at a lower power consumption than the enabled mode;a third circuit capable of being enabled to obtain the input code via the electromagnetic signal and decoding the electromagnetic signal into a digital signal comprising the input code, the third circuit comprising a first processor operatively connected to the second circuit, the first processor having an enabled mode and a disabled mode, wherein the first processor is capable of entering the disabled mode after a period of time, wherein the disabled mode causes the first processor to operate at a lower power consumption rate than during the enabled mode; anda fourth circuit comprising a second processor separated from the first processor, the second processor being capable of entering an enabled mode distinguishable from the enabled mode of the first processor, and distinguishable from the enabled mode of the second circuit, and a disabled mode, wherein the disabled mode causes the second processor to operate at a lower power consumption rate than during the enabled mode;an authorization signal being generated by the third circuit in response to the input code matching the stored access code;a communication port operatively connected to one of either the first processor or the second processor, wherein one of either the first processor or the second processor receives a program signal through the communication port, and in response to the program signal enters a program mode of operation,receives a code through the communication port from a device remote to the battery-powered electronic-access control system,stores the code into the memory to form the stored access code when one of either the first processor or the second processor is in the enabled mode, and wherein the first processor or the second processor enters the disabled mode at a time thereafter;wherein the first processor communicates a signal to either enable or wake up the second processor to determine if the input matches the stored access code. 8. A battery-powered electronic-access control system comprising: a first processor and a second processor, each processor having an enabled mode and a disabled mode, wherein a current drained from a battery is less during the disabled mode than in the enabled mode;a circuit comprising one of either a timer or an oscillator and having an output for activating the first processor, wherein the first processor senses a signal received from an one of either an antenna or a receiver circuit and includes an output for indicating detection of a remote device capable of transmitting an electromagnetic signal;a receiver circuit for receiving an electromagnetic signal and decoding the electromagnetic signal into a digital signal including an input code, the circuit having an enabled mode for receiving the input code and a disabled mode, wherein the receiving circuit operates at a lower power consumption in the disabled mode than when the first circuit is in the enabled mode;wherein the first processor is in the enabled mode and obtaining an input code transmitted via the electromagnetic signal, the first processor entered a disabled mode thereafter, the second processor being separated from the first processor and the receiver circuit and temporarily enabled distinguishably from the enabled mode of the first processor and temporarily enabled distinguishably from the enabled mode of the receiver circuit, the second processor receives the input code from the first processor and compares the input code to an authorization code for authorizing operation of a system comprising one of either a latch or an alarm;a communication port operatively connected to one of either the first processor or the second processor, the first processor or the second processor being programmed to receive a write signal through the communication port, and in response to the write signal, one of either the first processor or the second processor enters a program mode of operation,receives a code through the communication port from a device remote to the battery-powered electronic-access control system, andstores the code into a memory to form a stored code when the first processor or the second processor is in the enabled mode, and enters the disabled mode at a time thereafter;wherein the first processor communicates a signal to either enable or wake up the second processor to compare the input code to the authorization code. 9. A battery-powered electronic-access control system comprising: a circuit having a portion deactivated during a first time period, a portion of the circuit activated during a second time period, a portion of the circuit enabled for sensing an electromagnetic signal, a portion of the circuit being enabled for an extended time period that is greater than the second time period for receiving an input code via an electromagnetic signal and decoding the electromagnetic signal into a digital signal comprising an input code, a portion of the circuit comprising a first processor being in the enabled mode and obtaining the input code transmitted via the electromagnetic signal, the first processor entering a disabled mode thereafter;a second processor being temporarily enabled distinguishably from the enabled mode of the first processor and enabled distinguishably from the enabled mode of the portion of the circuit being enabled for the extended period of time, the second processor receives the input code from the first processor and compares the input code to an authorization code for authorizing operation of a system comprising one of either a latch or an alarm;a communication port operatively connected to one of either the first processor or the second processor, one of either the first processor or the second processor being programmed to receive a write signal through the communication port, and in response to the write signal, one of either the first processor or the second processor enters a program mode of operation,receives a code through the communication port from a device remote to the battery-powered electronic-access control system, andstores the code into a memory to form a stored code when one of either the first processor or the second processor is in the enabled mode, and enters the disabled mode at a time thereafter;wherein the first processor communicates a signal to either enable or wake up the second processor to compare the input code to the authorization code. 10. A battery-powered electronic-access control system comprising: a first processor and a second processor, each processor having an enabled mode and a disabled mode, wherein a current drained from a battery is less during the disabled mode than in the enabled mode;a circuit for activating the first processor, wherein the first processor senses a signal received from an antenna and includes an output for indicating detection of a remote device capable of transmitting an electromagnetic signal;a receiver circuit for receiving an electromagnetic signal and decoding the electromagnetic signal into a digital signal including an input code, the circuit having an enabled mode for receiving the input code and a disabled mode, wherein the receiving circuit operates at a lower power consumption in the disabled mode than when the first circuit is in the enabled mode;wherein the first processor is in the enabled mode, obtains the input code transmitted via the electromagnetic signal, and enters a disabled mode thereafter;a circuit portion being responsive to the input code, wherein the circuit portion increases the current drained from the battery and decreases the current drained from the battery after receiving the input code;wherein the second processor is separated from the first processor and from the receiver circuit and enters an enabled mode distinguishable from the enabled mode for the first processor and distinguishable from the enabled mode of the receiver circuit, the second processor receiving the input code from the first processor and comparing the input code to an authorization code for authorizing operation of a system comprising one of either a latch or an alarm;a communication port operatively connected to one of either the first processor or the second processor, one of either the first processor or the second processor being programmed to receive a write signal through the communication port and, in response to the write signal, one of either the first processor or the second processor enters a program mode of operation,receives a code through the communication port from a device remote to the battery-powered electronic-access control system, andstores the code into a memory to form a stored code when one of either the first processor or the second processor is in the enabled mode, and enters the disabled mode sometime thereafter;wherein the first processor communicates a signal to either enable or wake up the second processor to compare the input code to the authorization code. 11. A method for accessing an electronic device comprising the steps of: enabling a receiver circuit powered by a battery and increasing the power drain by the battery during a first time period, sensing an electromagnetic signal and decoding the electromagnetic signal into a digital signal comprising an input code, and disabling the receiver circuit and decreasing the power drain of the battery;generating a signal to indicate detection of a device capable of providing an electromagnetic signal;obtaining the input code transmitted by the electromagnetic signal by a temporarily enabled first processor powered by a battery during a second time period, and disabling the first processor to decrease the power drain of the battery by the first processor;enabling a second processor powered by a battery and separate from the first processor during a third time period, the third time period being distinguishable from the first and the second time periods;comparing the input code to an authorization code by the second processor for authorizing operation of a device comprising one of either a latch or an alarm;providing an output to the device if the input code matches the authorization code; anddecreasing the current drained from the battery by the second processor after comparing the input code. 12. A method for actuating an electronic device comprising the steps of: temporarily enabling and disabling a circuit comprising a first processor during each of a plurality of cycles wherein the circuit is enabled during a first time period during each of the cycles;temporarily enabling and disabling a receiver circuit for receiving an electromagnetic signal and decoding the electromagnetic signal into a digital signal comprising an input code;obtaining an input code transmitted via a communication port;temporarily enabling a second processor separate from the first processor and separate from the receiver circuit in response to receipt of the input code during a second time period, the second time period being distinguishable from the first time period;comparing the input code to an authorization code for authorizing operation of a device comprising one of either a latch or alarm;sensing a signal for enabling a circuit as the input code is being obtained; andproviding a signal to the device when the input code matches the authorization code. 13. A battery-powered electronic-access control system comprising: memory containing a stored access code;a first circuit for sensing an electromagnetic signal including an input code,a second circuit capable of being enabled to obtain the input code via the electromagnetic signal, the second circuit comprising a first processor operatively connected to the first circuit, the first processor having an enabled mode and a disabled mode, the first processor being capable of entering the disabled mode for period of time, and the disabled mode causes the first processor to operate at a lower power consumption rate than when the processor is in the enabled mode; anda third circuit comprising a second processor separated from the first processor and capable of entering an enabled mode distinguishable from the enabled mode of the first processor, the second processor being capable of entering a disabled mode causing the second processor to operate at a lower power consumption rate than during the enabled mode;an authorization signal generated by the third circuit in response to the input code matching the stored access code; andwherein the first and the second processors having a bi-directional communication port, the bi-directional port of the first processor operatively connected to the bi-directional port of the second processor, the first processor capable of both receiving data and transmitting data with the second processor through the bi-directional ports during the enabled modes of operation. 14. A battery-powered electronic-access control system comprising: memory containing a stored access code;a first circuit capable of generating a wake-up signal in response to a first key being depressed on a keypad used in entering an input code comprising the first key and at least one subsequent keypad entry;the first circuit comprising a first processor, the first processor having an awake mode and a sleep mode, the first processor being capable of entering the sleep mode for period of time, and the sleep mode causes the first processor to operate at a lower power consumption rate than when the processor is in the awake mode;a second circuit comprising a second processor separated from the first processor and capable of entering an awake mode, the second processor being capable of entering a sleep mode causing the second processor to operate at a lower power consumption rate than during the awake mode;a signal to activate a lock actuator being generated by the second circuit in response to the input code matching the stored access code;an input port operatively connected to one of either the first processor or the second processor, wherein the connected processor receives a program signal through the communication port, and in response to the program signal enters a program mode of operation,receives a code through the communication port from a device remote to the battery-powered electronic-access control,stores the code into the memory to form the stored access code when one of either the first processor or the second processor is in the awake mode, and wherein one of either the first processor or the second processor enters a sleep-mode at a time thereafter; andwherein the first and the second processors having a bi-directional communication port, the bi-directional port of the first processor operatively connected to the bi-directional port of the second processor, the first processor capable of both receiving data and transmitting data with the second processor through the bi-directional ports during the awake modes of operation. 15. The access control system of claim 3 wherein the enabled mode of the first circuit is distinguishable from the awake mode of the second circuit. 16. The access control system of claim 3 wherein the first circuit transitions to the enabled mode via a signal from the first processor. 17. The access control system of claim 3 wherein a circuit senses a particular frequency of the electromagnetic signal and the enabled mode of the first circuit is entered or extended. 18. The access control system of claim 6 wherein the enabled mode of the receiver circuit is distinguishable from the enabled mode of the first processor. 19. The access control system of claim 6 wherein the receiver circuit transitions to the enabled mode via a signal from the first processor. 20. The access control system of claim 6 wherein a circuit senses a particular frequency of the electromagnetic signal and the enabled mode of the receiver circuit is entered or extended. 21. The access control system of claim 7 wherein the enabled mode of the second circuit is distinguishable from the enabled mode of the third circuit. 22. The access control system of claim 7 wherein the second circuit transitions to the enabled mode via a signal from the first processor. 23. The access control system of claim 7 wherein a circuit senses a particular frequency of the electromagnetic signal and the enabled mode of the receiver circuit is entered or extended. 24. The access control system of claim 8 wherein the enabled mode of the receiver circuit is distinguishable from the enabled mode of the first processor. 25. The access control system of claim 8 wherein the receiver circuit transitions to the enabled mode via a signal from the first processor. 26. The access control system of claim 8 wherein a circuit senses a particular frequency of the electromagnetic signal and the enabled mode of the receiver circuit is entered or extended. 27. The access control system of claim 9 wherein the enabled mode of the circuit enabled for the extended period of time is distinguishable from the enabled mode of the first processor. 28. The access control system of claim 9 wherein the circuit enabled for sensing the electromagnetic signal transitions to the enabled mode via a signal from the first processor. 29. The access control system of claim 9 wherein a circuit senses a particular frequency of the electromagnetic signal and the enabled mode of the circuit enabled for sensing the electromagnetic signal is entered or extended. 30. The access control system of claim 10 wherein the enabled mode of the receiver circuit is distinguishable from the enabled mode of the first processor. 31. The access control system of claim 10 wherein the receiver circuit transitions to the enabled mode via a signal from the first processor. 32. The access control system of claim 10 wherein a circuit senses a particular frequency of the electromagnetic signal and the enabled mode of the receiver circuit is entered or extended. 33. The access control system of claim 11 wherein the enabled mode of the receiver circuit is distinguishable from the enabled mode of the first processor. 34. The access control system of claim 11 wherein the receiver circuit transitions to the enabled mode via a signal from the first processor. 35. The access control system of claim 11 wherein a circuit senses a particular frequency of the electromagnetic signal and the enabled mode of the receiver circuit is entered or extended. 36. The access control system of claim 12 wherein the enabled mode of the receiver circuit is distinguishable from the enabled mode of the first processor. 37. The access control system of claim 12 wherein the receiver circuit transitions to the enabled mode via a signal from the first processor. 38. The access control system of claim 12 wherein a circuit senses a particular frequency of the electromagnetic signal and the enabled mode of the receiver circuit is entered or extended.