IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0417135
(2012-03-09)
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등록번호 |
US-8716098
(2014-05-06)
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발명자
/ 주소 |
- Herner, Scott Brad
- Vasquez, Natividad
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출원인 / 주소 |
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
3 인용 특허 :
103 |
초록
▼
A method for forming a non-volatile memory device includes providing a substrate having a surface region, forming a first wiring structure overlying the surface region, depositing a first dielectric material overlying the first wiring structure, forming a via opening in the first dielectric material
A method for forming a non-volatile memory device includes providing a substrate having a surface region, forming a first wiring structure overlying the surface region, depositing a first dielectric material overlying the first wiring structure, forming a via opening in the first dielectric material to expose a portion of the first wiring structure, while maintaining a portion of the first dielectric material, forming a layer of resistive switching material comprising silicon, within the via opening, forming a silver material overlying the layer of resistive switching material and the portion of the first dielectric material, forming a diffusion barrier layer overlying the silver material, and selectively removing a portion of the silver material and a portion of the diffusion barrier layer overlying the portion of the first dielectric material while maintaining a portion of the silver material and a portion of the diffusion barrier material overlying the layer of silicon material.
대표청구항
▼
1. A method for forming a non-volatile memory device configured with a resistive switching element, the method comprising: providing a substrate having a surface region;depositing a first dielectric material overlying the surface region;forming a first wiring structure overlying the first dielectric
1. A method for forming a non-volatile memory device configured with a resistive switching element, the method comprising: providing a substrate having a surface region;depositing a first dielectric material overlying the surface region;forming a first wiring structure overlying the first dielectric material;depositing a second dielectric material overlying the first wiring structure;forming a via opening in the second dielectric material to expose a portion of the first wiring structure, while maintaining a portion of the second dielectric material;forming a resistive switching material structure comprising an amorphous silicon material within the via opening;depositing a metal material comprising a silver material, wherein a first portion of the metal material overlies the resistive switching material structure, and wherein a second portion of the metal material overlies at least the portion of the dielectric material, wherein the first portion of the metal material contacts the resistive switching material structure;forming a diffusion barrier layer overlying the metal material, wherein a first portion of the diffusion barrier layer contacts the first portion of the metal material; andselectively removing the second portion of the metal material and a second portion of the diffusion barrier layer overlying the second portion of the metal material to form a second wiring structure using a solution at a predetermined temperature while maintaining the portion of the diffusion barrier material and the first portion of the metal material within the via opening, wherein the solution is selected from a group consisting of: phosphoric acid, acetic acid, nitric acid, water, and combinations thereof. 2. The method of claim 1, wherein the solution weakens adhesion between the second portion of the metal material and the portion of the dielectric material to delaminate the second portion of the metal material from the portion of the dielectric material. 3. The method of claim 1 wherein the resistive switching material structure comprises undoped amorphous silicon, and wherein the first wiring structure comprises p-doped polysilicon. 4. The method of claim 1 wherein the first wiring structure is selected from a group consisting of: tungsten, aluminum, copper, silver, a doped semiconductor material. 5. The method of claim 3wherein the first wiring structure is spatially configured to extend in a first direction; andwherein the second wiring structure is spatially configured to extend in a second direction orthogonal to the first direction. 6. The method of claim 1 wherein a metal material for the first wiring structure is selected from a group consisting of: tungsten, copper, silver, aluminum, an alloy. 7. The method of claim 1 wherein the diffusion barrier material is selected from a group consisting of: titanium, titanium nitride, tantalum nitride, titanium tungsten, or a combination thereof. 8. The method of claim 1 wherein the metal material is characterized by a diffusivity in the resistive switching material structure in the presence of an electric field. 9. The method of claim 1 wherein the predetermined temperature ranges from about 25 Degree Celsius to about 80 Degree Celsius. 10. The method of claim 1 wherein the resistive switching material structure is selected from a group consisting of: a single resistive switching material layer; a barrier layer between a first resistive switching material layer and a second resistive switching material layer; an oxide layer between a first undoped amorphous silicon layer and a second undoped amorphous silicon layer. 11. The method of claim 1 wherein the solution comprises about 80% phosphoric acid, about 5% acetic acid, about 5% nitric acid, and about 10% water. 12. The method of claim 1 wherein selectively removing the second portion of the metal material and the second portion of the diffusion barrier material is characterized by a reaction rate, wherein the reaction rate decreases with an increase of acetic acid in the solution. 13. The method of claim 1wherein the first wiring structure comprises one or more adhesion materials or diffusion barrier materials;wherein the one or more adhesion materials or diffusion barrier materials are selected from a group consisting of: titanium, titanium nitride, tantalum nitride, titanium tungsten, and combinations thereof. 14. The method of claim 1 wherein the first wiring structure includes a material selected from a group consisting of: polysilicon material, silicon germanium material, a microcrystalline silicon material. 15. A method for forming a silver active metal for a non-volatile memory device, comprising: forming a first wiring structure overlying a surface region of a substrate;depositing a first dielectric material overlying the first wiring structure;forming a via opening in the first dielectric material to expose a portion of the first wiring structure, while maintaining a portion of the first dielectric material;forming a structure of resistive switching material within the via opening, wherein the resistive switching material comprises a silicon material;forming a silver material overlying the structure of resistive switching material and overlying the portion of the first dielectric material;forming a diffusion barrier layer overlying the silver material to form a resulting structure;selectively removing a portion of the silver material and a portion of the diffusion barrier layer overlying the portion of the first dielectric material while maintaining a portion of the silver material and a portion of the diffusion barrier material overlying the layer of silicon material within the via opening via a wet etch process using a solution comprising: acetic acid, phosphoric acid, and nitric acid. 16. The method of claim 15 wherein forming the structure of resistive switching material comprises: forming a first undoped amorphous silicon layer, forming a barrier layer on top of the first undoped amorphous silicon layer, and forming a second undoped amorphous silicon layer on top of the barrier layer. 17. The method of claim 15 wherein the wet etch process is carried out at a temperature ranging from about 35 Degree Celsius to about 45 Degree Celsius. 18. The method of claim 15 wherein the solution comprises about 80% phosphoric acid, about 5% acetic acid, about 5% nitric acid, and about 10% water. 19. The method of claim 15 wherein the wet etch process is patternless. 20. A method for forming a silver active metal for a non-volatile memory device, comprising: forming a first wiring structure overlying a surface region of a substrate;depositing a first dielectric material overlying the first wiring structure;forming a via opening in the first dielectric material to expose a portion of the first wiring structure, while maintaining a portion of the first dielectric material;forming a structure of resistive switching material within the via opening, comprising: forming a first undoped amorphous silicon layer;forming a barrier layer on top of the first undoped amorphous silicon layer; andforming a second undoped amorphous silicon layer on top of the barrier layer;wherein the resistive switching material comprises a silicon material;forming a silver material overlying the structure of resistive switching material and overlying the portion of the first dielectric material;forming a diffusion barrier layer overlying the silver material to form a resulting structure;selectively removing a portion of the silver material and a portion of the diffusion barrier layer overlying the portion of the first dielectric material while maintaining a portion of the silver material and a portion of the diffusion barrier material overlying the layer of silicon material within the via opening. 21. The method of claim 20 wherein selective removing the portion of the silver material and the portion of the diffusion barrier layer overlying the portion of the first dielectric material comprises subjecting a resulting structure to a wet etch process using a solution selected from a group consisting of: phosphoric acid, acetic acid, nitric acid, water, and combinations thereof.
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