최소 단어 이상 선택하여야 합니다.
최대 10 단어까지만 선택 가능합니다.
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
NTIS 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
DataON 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Edison 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Kafe 바로가기국가/구분 | United States(US) Patent 등록 |
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국제특허분류(IPC7판) |
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출원번호 | US-0328385 (2011-12-16) |
등록번호 | US-8736303 (2014-05-27) |
발명자 / 주소 |
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출원인 / 주소 |
|
인용정보 | 피인용 횟수 : 7 인용 특허 : 1122 |
A circuit with a plurality of analog circuit blocks, each configured to provide at least one analog function and a programmable interconnect coupled of the analog circuit blocks and configurable to interconnect combinations of the analog circuit blocks to one another. The circuit is formed in an int
A circuit with a plurality of analog circuit blocks, each configured to provide at least one analog function and a programmable interconnect coupled of the analog circuit blocks and configurable to interconnect combinations of the analog circuit blocks to one another. The circuit is formed in an integrated circuit (chip) and the programmable interconnect comprises a plurality of switches coupled between the analog circuit blocks and ports that provide signal connections for the chip.
1. A circuit, comprising: a plurality of analog circuit blocks, each configured to provide at least one analog function; anda programmable interconnect coupled to the analog circuit blocks and configurable to interconnect combinations of the analog circuit blocks to one another, wherein the circuit
1. A circuit, comprising: a plurality of analog circuit blocks, each configured to provide at least one analog function; anda programmable interconnect coupled to the analog circuit blocks and configurable to interconnect combinations of the analog circuit blocks to one another, wherein the circuit is formed in an integrated circuit and wherein the programmable interconnect comprises a plurality of switches coupled between the analog circuit blocks and ports that provide signal connections for the integrated circuit, wherein the plurality of switches are configured in one or more multiplexer (MUX) circuits, the MUX circuits comprising MUX inputs and MUX outputs coupled to the analog circuit blocks. 2. The circuit of claim 1, further comprising at least one digital block comprising a plurality of digital blocks that each provides at least one digital function, and wherein the programmable interconnect is further coupled to the plurality of digital blocks and configurable to interconnect combinations of the plurality of digital blocks to one another. 3. The circuit of claim 1, wherein the one or more MUX circuits comprise block MUX circuits coupled to the analog circuits. 4. The circuit of claim 1, wherein the programmable interconnect is programmable to provide multiple signal paths between same analog circuit blocks. 5. The circuit of claim 1, wherein the analog circuit blocks are selected from the group of: analog continuous time amplifiers and switched capacitor type circuits. 6. A circuit, comprising: a programmable interconnect configurable to enable multiple signal routing between signal paths;a plurality of analog circuit blocks formed in a same integrated circuit comprising inputs and outputs coupled to the signal paths, each analog block providing at least one analog function, wherein the programmable interconnect comprises a plurality of switches coupled between the analog circuit blocks and ports that provide signal connections for the same integrated circuit; andan internal input/output (I/O) bus comprising bus lines coupled to the signal paths. 7. The circuit of claim 6, wherein the programmable interconnect is configurable to connect multiple analog blocks in series with one another. 8. The circuit of claim 6, further comprising at least one digital circuit block comprising a plurality of digital circuit blocks formed in the same integrated circuit comprising inputs and outputs coupled to the signal paths. 9. The circuit of claim 6, wherein each analog circuit block is programmable between at least one of a plurality of different analog functions. 10. The circuit of claim 6, wherein: the same integrated circuit comprises at least one port as a signal connection point; andthe programmable interconnect is configurable to connect the at least one port to any of the analog circuit blocks. 11. The circuit of claim 10, wherein the programmable interconnect is configurable to provide an analog signal input path from the at least one port to any of the analog circuit blocks. 12. The circuit of claim 10, wherein the programmable interconnect is configurable to provide an analog signal output path from any of the analog circuit blocks to the at least one port. 13. A method, comprising: providing a plurality of analog circuit blocks in an integrated circuit; andproviding a programmable interconnect configurable to at least enable combinations of analog circuit blocks to be interconnected to combine analog functions of the analog circuit blocks using a plurality of switches coupled between the analog circuit blocks and ports that provide signal connections for the integrated circuit, wherein the plurality of switches are configured in one or more multiplexer (MUX) circuits, the MUX circuits comprising MUX inputs and MUX outputs coupled to the analog circuit blocks. 14. The method of claim 13, further comprising enabling any of the analog circuit blocks to be connected to at least one port that provides a signal connection point to the integrated circuit using the programmable interconnect. 15. The method of claim 13, further comprising: providing at least one digital circuit block in the integrated circuit; andenabling any of the digital circuit blocks to be interconnected to combine digital functions of the digital circuit blocks using the programmable interconnect. 16. The method of claim 13, further comprising enabling at least two analog circuit blocks to be coupled in series using the programmable interconnect. 17. The method of claim 13, further comprising enabling any of the analog circuit blocks to be connected to the at least one digital circuit block using the programmable interconnect. 18. The method of claim 13, further comprising providing an analog signal output path from any of the analog circuit blocks to the at least one port.
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