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[미국특허] Heterogeneous recovery in a redundant memory system 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-011/00
출원번호 US-0793363 (2013-03-11)
등록번호 US-8775858 (2014-07-08)
발명자 / 주소
  • Gower, Kevin C.
  • Lastras-Montano, Luis A.
  • Meaney, Patrick J.
  • Papazova, Vesselina K.
  • Stephens, Eldee
출원인 / 주소
  • International Business Machines Corporation
대리인 / 주소
    Cantor Colburn LLP
인용정보 피인용 횟수 : 48  인용 특허 : 52

초록 ▼

Providing heterogeneous recovery in a redundant memory system that includes a memory controller, a plurality of memory channels in communication with the memory controller, an error detection code mechanism configured for detecting a failing memory channel, and an error recovery mechanism. The error

대표청구항 ▼

1. A computer implemented method for detecting a failing memory channel and performing a recovery operation, the method comprising: receiving a notification that a memory channel has failed, the memory channel one of a plurality of memory channels in a memory system;performing the recovery operation

이 특허에 인용된 특허 (52) 인용/피인용 타임라인 분석

  1. Huber, Harold Steven; Perez, Miguel Angel; Reed, David Charles; Smith, Max Douglas, Apparatus, system, and method for multi-address space tracing.
    상세보기
  2. Alves, Luiz C.; Lastras-Montano, Luis A.; Meaney, Patrick J.; Stephens, Eldee; Trager, Barry M., Correcting memory device and memory channel failures in the presence of known memory device failures.
    상세보기
  3. Davis, Henry A., DSP bus monitoring apparatus and method.
    상세보기
  4. Fukushima, Yukio; Katoh, Katsuhiko; Kobayashi, Shunsuke; Kuroda, Takashi; Nakagawa, Yuzo; Sai, Fuminori; Shimono, Emi; Tamura, Tetsuya; Ueda, Tetsuo, Data storage apparatus, read data processor, and read data processing method.
    상세보기
  5. Timothy Jay Dell ; Mark William Kellogg, Dynamic configuration of memory module using presence detect data.
    상세보기
  6. Nakamura Takahiko (Kanagawa JPX) Yoshida Hideo (Kanagawa JPX), Error correcting decoder and error correction decoding method.
    상세보기
  7. Fujita Hachiro,JPX ; Nakamura Takahiko,JPX ; Yoshida Hideo,JPX, Error correcting decoding apparatus of extended Reed-Solomon code, and error correcting apparatus of singly or doubly extended Reed-Solomon codes.
    상세보기
  8. Zook Christopher P. ; Glover Neal ; Schadegg ; Jr. John J., Error correction method and apparatus.
    상세보기
  9. Majni,Tim; Piccirillo,Gary J.; MacLaren,John M.; Lester,Robert A.; Larson,John E.; Johnson,Jerome J.; Clark,Benjamin H.; Ferguson,Patrick L.; Tavallaei,Siamak; Autor,Jeffrey S.; Post,Christian H.; Fink,Dan; Galloway,Jeffery; Roscoe,Bret D., Error indication in a raid memory system.
    상세보기
  10. Hans-Werner Knefel DE, Error recognition in a storage system.
    상세보기
  11. Olarig,Sompong P., Fail-over of multiple memory blocks in multiple memory modules in computer system.
    상세보기
  12. Resnick, David R., Failure recovery memory devices and methods.
    상세보기
  13. Rodi, Eugene A., Familial correction with non-familial double bit error detection for directory storage.
    상세보기
  14. Hess Richard F. (Glendale AZ) Liebel Kurt A. (Phoenix AZ) Yount Larry J. (Phoenix AZ), Fault recovery mechanism, transparent to digital system function.
    상세보기
  15. Katzman James A. (San Jose CA) Bartlett Joel F. (Palo Alto CA) Bixler Richard M. (Sunnyvale CA) Davidow William H. (Atherton CA) Despotakis John A. (Pleasanton CA) Graziano Peter J. (Los Altos CA) Gr, Fault-tolerant multiprocessor system.
    상세보기
  16. Groudan Alan I. (Harrington Park NJ) Pitt Garry E. (Towaco NJ) Barnes Lell E. (North Caldwell NJ), High reliability memory.
    상세보기
  17. Nakatsuji Fumio,JPX ; Hashimoto Yuichi,JPX, High-speed error correcting apparatus with efficient data transfer.
    상세보기
  18. Johnson, Jerome J.; MacLaren, John M.; Lester, Robert A.; Larson, John E.; Piccirillo, Gary J.; Post, Christian H.; Galloway, Jeffery; Lai, Ho M.; Anand, Anisha; Rose, Eric, Hot-upgrade/hot-add memory.
    상세보기
  19. Kimura Takemi (Kawasaki JPX) Hatta Masahiro (Kawasaki JPX) Egawa Hiroyuki (Kawasaki JPX) Takakusagi Akira (Kawasaki JPX), I/O interface control method and data processing equipment which completes I/O operation in execution when abnormal stat.
    상세보기
  20. Banks,David Murray; Jedwab,Jonathan; Davis,James A, Identifying uncorrectable codewords in a Reed-Solomon decoder for errors and erasures.
    상세보기
  21. Fry, Richard E.; Gollub, Marc A.; Retter, Eric E.; Wright, Kenneth L., Implementing enhanced memory reliability using memory scrub operations.
    상세보기
  22. Santeler,Paul A.; Jansen,Kenneth A.; Olarig,Sompong P., Main memory controller adapted to correct corrupted data by xoring corrupted data to directly generate correct data.
    상세보기
  23. Takizawa Makoto (328 Kamiasao ; Asao-ku Kawasaki JPX) Iwase Taira (1-5 ; Shirayuki-So ; 92 Akutsu ; Takatsu-ku Kawasaki JPX) Asano Masamichi (45-7-308 ; Denenchofuhoncho ; Oota-ku Tokyo JPX) Arime Ya, Mask ROM with spare memory cells.
    상세보기
  24. Fuoco Daniel P. (Boca Raton FL) Herring Christopher M. (Essex Junction VT) Kellogg Mark W. (Essex Junction VT) Lenta Jorge E. (Boca Raton FL), Memory card, computer system and method of operation for differentiating the use of read-modify-write cycles in operatin.
    상세보기
  25. Ferris Andrew T. (Bristol GBX) Work Gordon S. (Warrington GBX), Memory circuit capable of replacing a faulty column with a spare column.
    상세보기
  26. Lester, Robert A.; MacLaren, John M.; Ferguson, Patrick L.; Larson, John E., Memory data verify operation.
    상세보기
  27. Walker, William J.; MacLaren, John M., Memory sub-system error cleansing.
    상세보기
  28. Abe, Takashi, Memory system having a hot-swap function.
    상세보기
  29. Cypher, Robert E., Memory/Transmission medium failure handling controller and method.
    상세보기
  30. Nguyen Hung C. ; Hospodor Andrew D., Method and apparatus to protect data within a disk drive buffer.
    상세보기
  31. Hsieh,Chen Hui; Chen,Kun Lung; Chung,Shine Chien; Grigoriev,Grigori, Method and system for improving reliability of memory device.
    상세보기
  32. Elko David A. (Poughkeepsie NY) Goldrian Gottfried A. (Boeblingen DEX) Goss Steven N. (Lake Katrine NY) Gregg Thomas A. (Highland NY) Helffrich Audrey A. (Poughkeepsie NY) Verdibello ; Jr. Ambrose A., Multi channel inter-processor coupling facility processing received commands stored in memory absent status error of cha.
    상세보기
  33. Patel Rajiv N. (San Jose CA) Malamy Adam (Winchester MA), Multiple bank column redundancy intialization controller for cache RAM.
    상세보기
  34. Divivier Robert James (San Jose CA) Nemirovsky Mario (San Jose CA), Pipelined processor with two tier prefetch buffer structure and method with bypass.
    상세보기
  35. Hitz,David; Malcolm,Michael; Lau,James; Rakitzis,Byron, Providing parity in a RAID sub-system using non-volatile memory.
    상세보기
  36. Thayer,Larry; Rentschler,Eric McCutcheon; Tayler,Michael Kennard, RAID memory system.
    상세보기
  37. Thomann, Mark R.; Morzano, Christopher K.; Li, Wen, Read/write timing calibration of a memory array using a row or a redundant row.
    상세보기
  38. Cranford, Jr.,Hayden C.; Norman,Vernon R.; Schmatz,Martin, Receiver for clock and data recovery and method for calibrating sampling phases in a receiver for clock and data recovery.
    상세보기
  39. Gaskins Darius D. (Austin TX) Parks Terry J. (Round Rock TX), Redundant memory channel array configuration with data striping and error correction capabilities.
    상세보기
  40. Smith,Teoman; Fu,Xiongijian; Tao,Arthur; Dalia,Apurva F.; Beher,Mukeshkumar, Removal of stale information.
    상세보기
  41. Michael B. Raynham, Self-healing memory.
    상세보기
  42. Kudo Jun (Nara JPX) Ashida Tsutomu (Yamatokoriyama JPX), Semiconductor memory device with redundancy structure and process of repairing same.
    상세보기
  43. Kushida,Keiichi, Semiconductor memory including error correction function.
    상세보기
  44. Dell Timothy J. (Colchester VT) Farah Lina S. (Burlington VT) Feng George C. (Essex Junction VT) Kellogg Mark W. (Essex Junction VT), Synchronous memory packaged in single/dual in-line memory module and method of fabrication.
    상세보기
  45. Nerl,John A.; Pomaranski,Ken; Gostin,Gary; Walton,Andrew; Soper,David, System and method for applying error correction code (ECC) erasure mode and clearing recorded information from a page deallocation table.
    상세보기
  46. Lary Richard F. (Colorado Springs CO), System and method for calculating RAID 6 check codes.
    상세보기
  47. O'Connor, James A.; Lastras-Montano, Luis A.; Alves, Luis C.; Clarke, William J.; Dell, Timothy J.; Dewkett, Thomas J.; Gower, Kevin C., System and method for error correction and detection in a memory system.
    상세보기
  48. Wygodny Shlomo,ILX ; Barboy Dmitry,ILX ; Prouss Georgi,UAX ; Vorobey Anatoly,ILX, System and method for monitoring and analyzing the execution of computer programs.
    상세보기
  49. Erdmann,Michael, System and method for re-routing signals between memory system components.
    상세보기
  50. Ali Khan,Khasid M.; Bak,Boris M.; Aiken,Craig A.; Widjaja,Tony, System and method for real-time processing of nondeterministic captured data events.
    상세보기
  51. Brueggen,Christopher M., Systems and methods for providing error correction code testing functionality.
    상세보기
  52. Skaanning, Claus; Suermondt, Henri Jacques; Jensen, Finn Verner, Validation of probabilistic troubleshooters and diagnostic system.
    상세보기

이 특허를 인용한 특허 (48) 인용/피인용 타임라인 분석

  1. Botes, Par; Colgrove, John; Hayes, John, Ability to partition an array into two or more logical arrays with independently running software.
    상세보기
  2. Davis, John D., Aggressive data deduplication using lazy garbage collection.
    상세보기
  3. Hayes, John; Lee, Robert, Authorizing I/O commands with I/O tokens.
    상세보기
  4. Hayes, John; Colgrove, John; Lee, Robert; Robinson, Joshua; Ostrovsky, Igor; Vajgel, Peter, Automatically reconfiguring a storage memory topology.
    상세보기
  5. Kannan, Hari; Miladinovic, Nenad; Tan, Zhangxi; Zhao, Randy, Calibration of flash channels in SSD.
    상세보기
  6. Davis, John D.; Hayes, John; Kannan, Hari; Miladinovic, Nenad; Tan, Zhangxi, Data rebuild on feedback from a queue in a non-volatile solid-state storage.
    상세보기
  7. Davis, John D.; Hayes, John; Tan, Zhangxi; Kannan, Hari; Miladinovic, Nenad, Data rebuild on feedback from a queue in a non-volatile solid-state storage.
    상세보기
  8. Hayes, John; Gupta, Shantanu; Davis, John; Gold, Brian; Tan, Zhangxi, Direct memory access data movement.
    상세보기
  9. Hayes, John; Lee, Robert; Ostrovsky, Igor; Vajgel, Peter, Distributed transactions with token-associated execution.
    상세보기
  10. Dalal, Parin Bhadrik, Efficient packet handling, redirection, and inspection using offload processors.
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  11. Dalal, Parin Bhadrik, Efficient packet handling, redirection, and inspection using offload processors.
    상세보기
  12. Dalal, Parin Bhadrik; Belair, Stephen Paul, Efficient packet handling, redirection, and inspection using offload processors.
    상세보기
  13. Hayes, John Martin; Kannan, Hari; Miladinovic, Nenad, Erase block state detection.
    상세보기
  14. Davis, John D.; Hayes, John; Tan, Zhangxi; Kannan, Hari; Miladinovic, Nenad, Error recovery in a storage cluster.
    상세보기
  15. Dalal, Parin Bhadrik; Belair, Stephen Paul, Full bandwidth packet handling with server systems including offload processors.
    상세보기
  16. Dalal, Parin Bhadrik; Belair, Stephen Paul, Full bandwidth packet handling with server systems including offload processors.
    상세보기
  17. Dalal, Parin Bhadrik; Belair, Stephen Paul, Full bandwidth packet handling with server systems including offload processors.
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  18. Dalal, Parin Bhadrik; Belair, Stephen Paul, Full bandwidth packet handling with server systems including offload processors.
    상세보기
  19. Dalal, Parin Bhadrik; Belair, Stephen Paul, Full bandwidth packet handling with server systems including offload processors.
    상세보기
  20. Dalal, Parin Bhadrik; Belair, Stephen Paul, Full bandwidth packet handling with server systems including offload processors.
    상세보기
  21. Feigin, Boris; Kleinerman, Andrew; Tumanova, Svitlana; Vohra, Taher; Wang, Xiaohui, Geometry based, space aware shelf/writegroup evacuation.
    상세보기
  22. Davis, John D., Increased storage unit encryption based on loss of trust.
    상세보기
  23. Hayes, John; Gupta, Shantanu; Davis, John; Gold, Brian; Tan, Zhangxi, Nonrepeating identifiers in an address space of a non-volatile solid-state storage.
    상세보기
  24. Dalal, Parin Bhadrik; Belair, Stephen Paul, Offload processor modules for connection to system memory, and corresponding methods and systems.
    상세보기
  25. Dalal, Parin Bhadrik; Belair, Stephen Paul, Offload processor modules for connection to system memory, and corresponding methods and systems.
    상세보기
  26. Dalal, Parin Bhadrik, Offloading of computation for rack level servers and corresponding methods and systems.
    상세보기
  27. Dalal, Parin Bhadrik, Offloading of computation for rack level servers and corresponding methods and systems.
    상세보기
  28. Kannan, Hari; Kirkpatrick, Peter E., Page writes for triple level cell flash memory.
    상세보기
  29. Hayes, John; Gold, Brian; Lee, Robert, Parallel update to NVRAM.
    상세보기
  30. Botes, Par; Hayes, John; Tan, Zhangxi, Point to point based backend communication layer for storage processing.
    상세보기
  31. Dalal, Parin Bhadrik; Belair, Stephen Paul, Processing structured and unstructured data using offload processors.
    상세보기
  32. Hayes, John; Colgrove, John; Lee, Robert; Robinson, Joshua; Ostrovsky, Igor, Rebuilding data across storage nodes.
    상세보기
  33. Bernat, Andrew R.; Miller, Ethan L., Resharing of a split secret.
    상세보기
  34. Bernat, Andrew R.; Miller, Ethan L., Resharing of a split secret.
    상세보기
  35. Botes, Par; Colgrove, John; Davis, John; Hayes, John; Lee, Robert; Robinson, Joshua; Vajgel, Peter, Scalable non-uniform storage sizes.
    상세보기
  36. Hayes, John; Gupta, Shantanu; Davis, John; Gold, Brian; Tan, Zhangxi, Scheduling policy for queues in a non-volatile solid-state storage.
    상세보기
  37. Hayes, John; Gupta, Shantanu; Davis, John; Gold, Brian; Tan, Zhangxi, Self-describing data format for DMA in a non-volatile solid-state storage.
    상세보기
  38. Colgrove, John; Davis, John D.; Hayes, John Martin; Lee, Robert, Storage cluster.
    상세보기
  39. Hayes, John; Colgrove, John; Davis, John D., Storage cluster.
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  40. Hayes, John; Colgrove, John; Davis, John D., Storage cluster.
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  41. Hayes, John; Colgrove, John; Lee, Robert; Vajgel, Peter; Botes, Par, Storage cluster.
    상세보기
  42. Colgrove, John; Davis, John D.; Hayes, John, Storage system architecture.
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  43. Hayes, John; Colgrove, John; Davis, John D., Storage system architecture.
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  44. Hayes, John; Colgrove, John; Davis, John D., Storage system architecture.
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  45. Hayes, John; Colgrove, John; Davis, John D., Storage system architecture.
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  46. Shalev, Ori, Systems and methods for operating a storage system.
    상세보기
  47. Amiri, Behzad; Miladinovic, Nenad, Tracking of optimum read voltage thresholds in nand flash devices.
    상세보기
  48. Hayes, John; Gold, Brian; Gupta, Shantanu; Lee, Robert; Kannan, Hari, Transactional commits with hardware assists in remote memory.
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