IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0104924
(2013-12-12)
|
등록번호 |
US-8796734
(2014-08-05)
|
발명자
/ 주소 |
- Lochtefeld, Anthony J.
- Currie, Matthew T.
- Cheng, Zhiyuan
- Fiorenza, James
- Braithwaite, Glyn
- Langdo, Thomas A.
|
출원인 / 주소 |
- Taiwan Semiconductor Manufacturing Company, Ltd.
|
대리인 / 주소 |
Slater and Matsil, L.L.P.
|
인용정보 |
피인용 횟수 :
7 인용 특허 :
256 |
초록
Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
대표청구항
▼
1. A structure comprising: a substrate comprising a first crystalline semiconductor material;a dielectric layer over a top surface of the substrate, a trench being in the dielectric layer and having a length and a width adjoining the top surface of the substrate, the length being greater than the wi
1. A structure comprising: a substrate comprising a first crystalline semiconductor material;a dielectric layer over a top surface of the substrate, a trench being in the dielectric layer and having a length and a width adjoining the top surface of the substrate, the length being greater than the width;a second crystalline semiconductor material in the trench and adjacent the first crystalline semiconductor material, the second crystalline semiconductor material being lattice mismatched to the first crystalline semiconductor material, dislocations in the second crystalline semiconductor material arising from the lattice mismatch terminating at a sidewall of the trench, a portion of the second crystalline semiconductor material extending out of the trench to form a fin;a gate structure over a top of the fin and along a sidewall of the fin; anda source/drain region defined in the fin proximate the gate structure. 2. The structure of claim 1, wherein the dislocations propagate in a crystallographic direction parallel to the top surface of the substrate, the sidewall being oriented at an angle to the crystallographic direction, the angle being between 30° and 60°. 3. The structure of claim 1, wherein the length is greater than a height of the sidewall. 4. The structure of claim 1, wherein a ratio of a height of the sidewall to the width is greater than or equal to 2. 5. The structure of claim 1, wherein the first crystalline semiconductor material is silicon. 6. The structure of claim 1, wherein the second crystalline semiconductor material comprises germanium, a III-V semiconductor compound, or a combination thereof. 7. A structure comprising: a substrate comprising a first crystalline semiconductor material;a dielectric layer over a top surface of the substrate, a trench being in the dielectric layer and having a length and a width adjoining the top surface of the substrate, the length being greater than the width;a second crystalline semiconductor material in the trench and adjacent the first crystalline semiconductor material, the second crystalline semiconductor material being lattice mismatched to the first crystalline semiconductor material, dislocations in the second crystalline semiconductor material arising from the lattice mismatch terminating at a sidewall of the trench;a third crystalline semiconductor material disposed over the second crystalline semiconductor material, the third crystalline semiconductor material being a different material from the second crystalline semiconductor material; anda device formed at least partially in the third crystalline semiconductor material. 8. The structure of claim 7, wherein the third crystalline semiconductor material is strained, the second crystalline semiconductor material inducing the strain in the third crystalline semiconductor material. 9. The structure of claim 7, wherein a bandgap energy of the second crystalline semiconductor material is greater than a bandgap energy of the third crystalline semiconductor material. 10. The structure of claim 7, wherein the device comprises a channel region and a source/drain region in the third crystalline semiconductor material. 11. The structure of claim 7, wherein the dislocations propagate in a crystallographic direction parallel to the top surface of the substrate, the sidewall being oriented at an angle to the crystallographic direction, the angle being between 30° and 60°. 12. The structure of claim 7, wherein the length is greater than a height of the sidewall. 13. The structure of claim 7, wherein a ratio of a height of the sidewall to the width is greater than or equal to 2. 14. A structure comprising: a substrate comprising a first crystalline semiconductor material, at least a portion of the first crystalline semiconductor material being in a top surface of the substrate and doped with dopants of a first dopant type;a dielectric layer over the top surface of the substrate, a trench being in the dielectric layer and having a length and a width adjoining the top surface of the substrate, the length being greater than the width; anda second crystalline semiconductor material having a first portion in the trench and adjacent the first crystalline semiconductor material and having a second portion over the first portion, the second crystalline semiconductor material being lattice mismatched to the first crystalline semiconductor material, dislocations in the first portion of the second crystalline semiconductor material arising from the lattice mismatch terminating at a sidewall of the trench, the first portion of the second crystalline semiconductor material being doped with dopants of the first dopant type, the second portion of the second crystalline semiconductor material being doped with dopants of a second dopant type, the second dopant type being opposite from the first dopant type. 15. The structure of claim 14, wherein the first dopant type is a p-type dopant, and the second dopant type is an n-type dopant. 16. The structure of claim 14, wherein the second crystalline semiconductor material has a third portion disposed between the first portion and the second portion, the third portion being intrinsic. 17. The structure of claim 14, wherein the second portion extends above a top surface of the dielectric layer. 18. The structure of claim 14, wherein the dislocations propagate in a crystallographic direction parallel to the top surface of the substrate, the sidewall being oriented at an angle to the crystallographic direction, the angle being between 30° and 60°. 19. The structure of claim 14, wherein the length is greater than a height of the sidewall. 20. The structure of claim 14, wherein a ratio of a height of the sidewall to the width is greater than or equal to 2.
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