DRAM MIM capacitor using non-noble electrodes
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IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-021/00
H01L-049/02
출원번호
US-0033326
(2013-09-20)
등록번호
US-8969169
(2015-03-03)
발명자
/ 주소
Chen, Hanhong
Chi, David
Hashim, Imran
Horikawa, Mitsuhiro
Malhotra, Sandra G.
출원인 / 주소
Intermolecular, Inc.
인용정보
피인용 횟수 :
0인용 특허 :
17
초록▼
A method for forming a capacitor stack includes forming a first bottom electrode layer including a conductive metal nitride material. A second bottom electrode layer is formed above the first bottom electrode layer. The second bottom electrode layer includes a conductive metal oxide material, wherei
A method for forming a capacitor stack includes forming a first bottom electrode layer including a conductive metal nitride material. A second bottom electrode layer is formed above the first bottom electrode layer. The second bottom electrode layer includes a conductive metal oxide material, wherein the crystal structure of the conductive metal oxide material promotes a desired high-k crystal phase of a subsequently deposited dielectric layer. A dielectric layer is formed above the second bottom electrode layer. Optionally, an oxygen-rich metal oxide layer is formed above the dielectric layer. Optionally, a third top electrode layer is formed above the oxygen-rich metal oxide layer. The third top electrode layer includes a conductive metal oxide material. A fourth top electrode layer is formed above the third top electrode layer. The fourth top electrode layer includes a conductive metal nitride material.
대표청구항▼
1. A method for forming a capacitor stack, the method comprising: forming a first bottom electrode layer above a surface of a substrate, wherein the first bottom electrode layer comprises a conductive metal nitride material;forming a second bottom electrode layer above the first bottom electrode lay
1. A method for forming a capacitor stack, the method comprising: forming a first bottom electrode layer above a surface of a substrate, wherein the first bottom electrode layer comprises a conductive metal nitride material;forming a second bottom electrode layer above the first bottom electrode layer, wherein the second bottom electrode layer comprises a conductive metal oxide material;forming a dielectric layer above the second bottom electrode layer;forming an oxygen-rich metal oxide layer above the dielectric layer; andforming a top electrode layer above the oxygen-rich metal oxide layer, wherein the top electrode layer comprises a conductive metal nitride material. 2. The method of claim 1, wherein the first bottom electrode layer and the top electrode layer each comprises one of titanium nitride, titanium aluminum nitride, titanium silicon nitride, tantalum nitride, tantalum aluminum nitride, or tantalum silicon nitride. 3. The method of claim 1, wherein the second bottom electrode layer comprises one of molybdenum oxide, chromium oxide, cobalt oxide, iridium oxide, manganese oxide, nickel oxide, ruthenium oxide, tin oxide, or tungsten oxide. 4. The method of claim 1, wherein the second bottom electrode layer comprises molybdenum oxide. 5. The method of claim 1, further comprising an anneal treatment after forming the second bottom electrode layer above the first bottom electrode layer and before forming the dielectric layer above the second bottom electrode layer. 6. The method of claim 1, wherein the dielectric layer comprises titanium oxide. 7. The method of claim 6, wherein the dielectric layer comprises titanium oxide and the dielectric layer further comprises a dopant. 8. The method of claim 7, wherein the dopant comprises aluminum. 9. The method of claim 1, further comprising an anneal treatment after forming the dielectric layer above the second bottom electrode layer and before forming the oxygen-rich metal oxide layer above the dielectric layer. 10. The method of claim 1, wherein the oxygen-rich metal oxide layer comprises molybdenum oxide. 11. The method of claim 1, wherein forming the top electrode layer comprises: forming a first top electrode layer above the oxygen-rich metal oxide layer; andforming a second top electrode layer above the first top electrode layer. 12. The method of claim 11, wherein the first top electrode layer comprises a metal oxide material and the second top electrode layer comprises a conductive metal nitride material. 13. The method of claim 12, wherein the second top electrode layer comprises one of titanium nitride, titanium aluminum nitride, titanium silicon nitride, tantalum nitride, tantalum aluminum nitride, or tantalum silicon nitride. 14. The method of claim 11, wherein the first top electrode layer comprises molybdenum oxide. 15. The method of claim 5, wherein the anneal treatment after forming the second bottom electrode layer is performed in one of an inert or a reducing atmosphere for between about 1 millsecond and about 60 minutes. 16. The method of claim 9, wherein the anneal treatment after forming the dielectric layer is performed in an oxidizing atmosphere between about 400 C and about 600 C for between about 1 millsecond and about 60 minutes. 17. The method of claim 1, further comprising performing an anneal treatment after forming the top electrode layer. 18. The method of claim 17, wherein the anneal treatment after forming the top electrode layer is performed soon after forming the top electrode layer. 19. A method for forming a capacitor stack, the method comprising: forming a first bottom electrode layer above a surface of a substrate, wherein the first bottom electrode layer comprises a conductive metal nitride material;forming a second bottom electrode layer above the first bottom electrode layer, wherein the second bottom electrode layer comprises a conductive metal oxide material;annealing the first and second bottom electrode layers;forming a dielectric layer above the second bottom electrode layer, wherein the dielectric layer comprises a metal oxide material;annealing the dielectric layer;forming an oxygen-rich metal oxide layer above the dielectric layer;forming a top electrode layer above the oxygen-rich metal oxide layer, wherein the top electrode layer comprises a conductive metal nitride material; andannealing the oxygen-rich metal oxide layer so that at least a portion of the oxygen-rich metal oxide layer is converted to a stoichiometric metal oxide compound. 20. The method of claim 19, wherein the first bottom electrode layer comprises titanium nitride, the second bottom electrode layer comprises molybdenum oxide, the dielectric layer comprises titanium oxide, the oxygen-rich metal oxide layer comprises molybdenum oxide, and the top electrode layer comprises titanium nitride.
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이 특허에 인용된 특허 (17)
Chen, Hanhong; Ode, Hiroyuki, Asymmetric MIM capacitor for DRAM devices.
Lee, Jung-hyun; Baik, Hion-suck; Kim, Soon-ho; Choi, Jae-young, Method of manufacturing stack-type capacitor and semiconductor memory device having the stack-type capacitor.
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