Display device and method for transferring image data
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-013/00
G09G-005/39
G09G-005/393
G06F-003/14
G09G-003/36
출원번호
US-0248118
(2011-09-29)
등록번호
US-8970611
(2015-03-03)
우선권정보
JP-2010-218435 (2010-09-29)
발명자
/ 주소
Ikeno, Kazuo
Satsukawa, Daisuke
출원인 / 주소
Yazaki Corporation
대리인 / 주소
Locke Lord LLP
인용정보
피인용 횟수 :
0인용 특허 :
12
초록▼
For providing a display device and a method for transferring an image data, shortening process time required to transfer image data without greater processing capacity, the CPU 4 outputs the bypass write signal to the GDC 6, the CPU 4 then outputs the read signal to both the ROM 5 and the GDC 6, and
For providing a display device and a method for transferring an image data, shortening process time required to transfer image data without greater processing capacity, the CPU 4 outputs the bypass write signal to the GDC 6, the CPU 4 then outputs the read signal to both the ROM 5 and the GDC 6, and the ROM 5 outputs the image data to the data bus 8 according to input of the read signal, wherein the GDC 6 directly reads the image data outputted on the data bus 8 according to input of the read not through the CPU 4 and writes the read image data to the VRAM 7.
대표청구항▼
1. A display device comprising: a first memory for storing an image data;a second memory, to which the image data stored in the first memory is transferred;a first controller reading the image data stored in the first memory and outputting the data to a data bus;a second controller reading the image
1. A display device comprising: a first memory for storing an image data;a second memory, to which the image data stored in the first memory is transferred;a first controller reading the image data stored in the first memory and outputting the data to a data bus;a second controller reading the image data from the data bus and then writing the image data to the second memory; anda single read signal line to which the read signal is outputted from the first controller, directly connected to the first controller, the first memory, and the second controller,wherein the data bus is mutually connected to the first memory, the first controller and the second controller;wherein when the first controller outputs a read signal to the read signal line, the image data is outputted to the data bus from the first memory;wherein the second controller reads directly the image data outputted to the data bus while avoiding the first controller and directly writes the read image data into the second memory according to the read signal inputted to the second controller via the single read signal line,wherein the first controller outputs a bypass write signal for instructing the second controller to transfer the image data, the bypass signal different from the read signal and being outputted at least during the read signal being outputted, andwherein when the bypass write signal is outputted during the read signal being outputted, the second controller reads the image data outputted in the data bus and writes the read image data on the second memory. 2. A method for transferring an image data in a display device including a first memory for storing an image data,a second memory to which the image data stored in the first memory is transferred,a first controller reading the image data stored in the first memory and outputting the data to a data bus,a second controller reading the data from the data bus and then writing the image data to the second memory, anda single read signal line to which the read signal is outputted from the first controller directly connected to the first controller, the first memory, and the second controller,wherein the data bus is mutually connected to the first memory, the first controller and the second controller, the first memory outputting the image data to the data bus upon the first controller outputting a read signal to the first memory that outputs the image data to the data bus for reading the image data stored in the data bus, the method transferring the image data stored in the data bus via the first memory to the second memory, the method comprising the steps of:outputting a read signal to both the second controller and the first memory by using the first controller;outputting the image data onto the data bus according to input of the read signal directly while avoiding the first controller; anddirectly writing the read image data into the second memory by using the second controller according to the read signal inputted to the second controller via the single read signal line,wherein the first controller outputs a bypass write signal for instructing the second controller to transfer the image data, the bypass signal different from the read signal and being outputted at least during the read signal being outputted, andwherein when the bypass write signal is outputted during the read signal being outputted, the second controller reads the image data outputted in the data bus and writes the read image data on the second memory.
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이 특허에 인용된 특허 (12)
Fukushima Tadashi (Hitachi JPX) Matsuo Shigeru (Hitachi JPX) Yoshida Shoji (Zama JPX) Komagawa Tooru (Hitachi JPX), Address-translatable graphic processor, data processor and drawing method with employment of the same.
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